CONTROLLED RESISTANCE INTEGRATED SNUBBER FOR POWER SWITCHING DEVICE

A semiconductor substrate has a main surface, a rear surface, an active device region, and an inactive region adjacent the active device region. Doped source, body, drift and drain regions, and electrically conductive gate and field electrodes are disposed in the active device region. The gate elect...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Ma, Ling, Burke, Hugo, Kelkar, Kapil
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Ma, Ling
Burke, Hugo
Kelkar, Kapil
description A semiconductor substrate has a main surface, a rear surface, an active device region, and an inactive region adjacent the active device region. Doped source, body, drift and drain regions, and electrically conductive gate and field electrodes are disposed in the active device region. The gate electrode is configured to control an electrical connection between the source and drain regions. The field electrode is adjacent to the drift region. A dielectric layer is disposed on the main surface, an electrically conductive source pad is formed in a first metallization layer that is formed on the dielectric layer. A resistor is connected between the source pad and the field electrode. The resistor includes an electrically conductive resistance section that is disposed in a resistor trench. The resistor trench is formed within the inactive region and is electrically isolated from every active device within the active device region.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3343638A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3343638A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3343638A13</originalsourceid><addsrcrecordid>eNrjZHB29vcLCfL38XF1UQhyDfYMDnH0c3ZV8PQLcXUPcgwBigb7hTo5uQYpuPkHKQT4hwNZweGeIc4enn7uCi6uYZ7OrjwMrGmJOcWpvFCam0HBzRWoQje1ID8-tbggMTk1L7Uk3jXA2NjE2MzYwtHQmAglAP_LK2E</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CONTROLLED RESISTANCE INTEGRATED SNUBBER FOR POWER SWITCHING DEVICE</title><source>esp@cenet</source><creator>Ma, Ling ; Burke, Hugo ; Kelkar, Kapil</creator><creatorcontrib>Ma, Ling ; Burke, Hugo ; Kelkar, Kapil</creatorcontrib><description>A semiconductor substrate has a main surface, a rear surface, an active device region, and an inactive region adjacent the active device region. Doped source, body, drift and drain regions, and electrically conductive gate and field electrodes are disposed in the active device region. The gate electrode is configured to control an electrical connection between the source and drain regions. The field electrode is adjacent to the drift region. A dielectric layer is disposed on the main surface, an electrically conductive source pad is formed in a first metallization layer that is formed on the dielectric layer. A resistor is connected between the source pad and the field electrode. The resistor includes an electrically conductive resistance section that is disposed in a resistor trench. The resistor trench is formed within the inactive region and is electrically isolated from every active device within the active device region.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180704&amp;DB=EPODOC&amp;CC=EP&amp;NR=3343638A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76419</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180704&amp;DB=EPODOC&amp;CC=EP&amp;NR=3343638A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Ma, Ling</creatorcontrib><creatorcontrib>Burke, Hugo</creatorcontrib><creatorcontrib>Kelkar, Kapil</creatorcontrib><title>CONTROLLED RESISTANCE INTEGRATED SNUBBER FOR POWER SWITCHING DEVICE</title><description>A semiconductor substrate has a main surface, a rear surface, an active device region, and an inactive region adjacent the active device region. Doped source, body, drift and drain regions, and electrically conductive gate and field electrodes are disposed in the active device region. The gate electrode is configured to control an electrical connection between the source and drain regions. The field electrode is adjacent to the drift region. A dielectric layer is disposed on the main surface, an electrically conductive source pad is formed in a first metallization layer that is formed on the dielectric layer. A resistor is connected between the source pad and the field electrode. The resistor includes an electrically conductive resistance section that is disposed in a resistor trench. The resistor trench is formed within the inactive region and is electrically isolated from every active device within the active device region.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHB29vcLCfL38XF1UQhyDfYMDnH0c3ZV8PQLcXUPcgwBigb7hTo5uQYpuPkHKQT4hwNZweGeIc4enn7uCi6uYZ7OrjwMrGmJOcWpvFCam0HBzRWoQje1ID8-tbggMTk1L7Uk3jXA2NjE2MzYwtHQmAglAP_LK2E</recordid><startdate>20180704</startdate><enddate>20180704</enddate><creator>Ma, Ling</creator><creator>Burke, Hugo</creator><creator>Kelkar, Kapil</creator><scope>EVB</scope></search><sort><creationdate>20180704</creationdate><title>CONTROLLED RESISTANCE INTEGRATED SNUBBER FOR POWER SWITCHING DEVICE</title><author>Ma, Ling ; Burke, Hugo ; Kelkar, Kapil</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3343638A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Ma, Ling</creatorcontrib><creatorcontrib>Burke, Hugo</creatorcontrib><creatorcontrib>Kelkar, Kapil</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ma, Ling</au><au>Burke, Hugo</au><au>Kelkar, Kapil</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CONTROLLED RESISTANCE INTEGRATED SNUBBER FOR POWER SWITCHING DEVICE</title><date>2018-07-04</date><risdate>2018</risdate><abstract>A semiconductor substrate has a main surface, a rear surface, an active device region, and an inactive region adjacent the active device region. Doped source, body, drift and drain regions, and electrically conductive gate and field electrodes are disposed in the active device region. The gate electrode is configured to control an electrical connection between the source and drain regions. The field electrode is adjacent to the drift region. A dielectric layer is disposed on the main surface, an electrically conductive source pad is formed in a first metallization layer that is formed on the dielectric layer. A resistor is connected between the source pad and the field electrode. The resistor includes an electrically conductive resistance section that is disposed in a resistor trench. The resistor trench is formed within the inactive region and is electrically isolated from every active device within the active device region.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP3343638A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title CONTROLLED RESISTANCE INTEGRATED SNUBBER FOR POWER SWITCHING DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T17%3A54%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Ma,%20Ling&rft.date=2018-07-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP3343638A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true