ICE PIN FUNCTIONALITY FOR MULTI-PROCESSOR CORE DEVICES

An embedded device has a plurality of processor cores, each with a plurality of peripheral devices, wherein each peripheral device may have an output, a housing with a plurality of assignable external pins, and a plurality of peripheral pin selection modules for each processing core, wherein each pe...

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Bibliographische Detailangaben
1. Verfasser: KRIS, Bryan
Format: Patent
Sprache:eng ; fre ; ger
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