BIAS TECHNIQUES AND CIRCUIT ARRANGEMENTS TO REDUCE LEAKAGE CURRENT IN A CIRCUIT
An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator.
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| creator | BOSSU, Frederic HUNG, Tsai-Pi GUDEM, Prasad Srinivasa Siva YOUSSEF, Ahmed Abdel Monem |
| description | An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator. |
| format | Patent |
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| language | eng ; fre ; ger |
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| subjects | BASIC ELECTRIC ELEMENTS CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS GENERATION SEMICONDUCTOR DEVICES |
| title | BIAS TECHNIQUES AND CIRCUIT ARRANGEMENTS TO REDUCE LEAKAGE CURRENT IN A CIRCUIT |
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