AMPLIFIER ARRANGEMENT
An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1'), at least a second differential stage (DS2) comprising at least two transistors (M3, M3'), at least one of the transistors of the first and second differential s...
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creator | Fitzi, Andreas |
description | An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1'), at least a second differential stage (DS2) comprising at least two transistors (M3, M3'), at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement. The transistors of one of the first and the second differential stages (DS1, DS2) are of a field effect transistor type having a first threshold voltage (Vth1). The transistors of another one of the first and the second differential stages (DS1, DS2) are of a bipolar transistor type having functionality of a second threshold voltage (Vth3) different from the first threshold voltage (Vth1). |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3113359B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3113359B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3113359B13</originalsourceid><addsrcrecordid>eNrjZBB19A3w8XTzdA1ScAwKcvRzd_V19QvhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgHGhobGxqaWTobGRCgBAGB-HoU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>AMPLIFIER ARRANGEMENT</title><source>esp@cenet</source><creator>Fitzi, Andreas</creator><creatorcontrib>Fitzi, Andreas</creatorcontrib><description>An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1'), at least a second differential stage (DS2) comprising at least two transistors (M3, M3'), at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement. The transistors of one of the first and the second differential stages (DS1, DS2) are of a field effect transistor type having a first threshold voltage (Vth1). The transistors of another one of the first and the second differential stages (DS1, DS2) are of a bipolar transistor type having functionality of a second threshold voltage (Vth3) different from the first threshold voltage (Vth1).</description><language>eng ; fre ; ger</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190102&DB=EPODOC&CC=EP&NR=3113359B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190102&DB=EPODOC&CC=EP&NR=3113359B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Fitzi, Andreas</creatorcontrib><title>AMPLIFIER ARRANGEMENT</title><description>An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1'), at least a second differential stage (DS2) comprising at least two transistors (M3, M3'), at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement. The transistors of one of the first and the second differential stages (DS1, DS2) are of a field effect transistor type having a first threshold voltage (Vth1). The transistors of another one of the first and the second differential stages (DS1, DS2) are of a bipolar transistor type having functionality of a second threshold voltage (Vth3) different from the first threshold voltage (Vth1).</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBB19A3w8XTzdA1ScAwKcvRzd_V19QvhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgHGhobGxqaWTobGRCgBAGB-HoU</recordid><startdate>20190102</startdate><enddate>20190102</enddate><creator>Fitzi, Andreas</creator><scope>EVB</scope></search><sort><creationdate>20190102</creationdate><title>AMPLIFIER ARRANGEMENT</title><author>Fitzi, Andreas</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3113359B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2019</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Fitzi, Andreas</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fitzi, Andreas</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>AMPLIFIER ARRANGEMENT</title><date>2019-01-02</date><risdate>2019</risdate><abstract>An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1'), at least a second differential stage (DS2) comprising at least two transistors (M3, M3'), at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement. The transistors of one of the first and the second differential stages (DS1, DS2) are of a field effect transistor type having a first threshold voltage (Vth1). The transistors of another one of the first and the second differential stages (DS1, DS2) are of a bipolar transistor type having functionality of a second threshold voltage (Vth3) different from the first threshold voltage (Vth1).</abstract><oa>free_for_read</oa></addata></record> |
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language | eng ; fre ; ger |
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subjects | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
title | AMPLIFIER ARRANGEMENT |
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