ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEST FOR EMBEDDED DEVICES

A method for testing linearity of an ADC, comprising receiving a trigger signal indicating an ADC input voltage step adjustment, reading an ADC output sample upon receiving the trigger signal, wherein the ADC output sample has a value range of N integer values that correspond to N discrete ADC outpu...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MOUSHEGIAN, Ken, ALLEMAN, Andrew, HARRINGTON, Cormac
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator MOUSHEGIAN, Ken
ALLEMAN, Andrew
HARRINGTON, Cormac
description A method for testing linearity of an ADC, comprising receiving a trigger signal indicating an ADC input voltage step adjustment, reading an ADC output sample upon receiving the trigger signal, wherein the ADC output sample has a value range of N integer values that correspond to N discrete ADC output codes, computing a histogram of code occurrences for M consecutive ADC output codes, wherein the histogram comprises M number of bins corresponding to the M consecutive ADC output codes, and wherein M is less than N, updating a DNL value and an INL value according to the histogram at an interval of K number of ADC output sample readings, and shifting the histogram by one ADC output code after updating the DNL and the INL values.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3111559A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3111559A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3111559A13</originalsourceid><addsrcrecordid>eNqNyrEKwjAQANAuDqL-w406ZAilg-OZu7YHaVLSo9CpFImTaKH-Py5-gNNb3r7oYjCulR4woI-N0WhIGlH04GIYOSknOCO5C3gJjEl0AuVBoY4JuLsxERMQj-J4OBa7x_Lc8unnoYCa1bUmr-85b-tyz6_8mbkvrbVVdUVb_lG-R-UtPw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEST FOR EMBEDDED DEVICES</title><source>esp@cenet</source><creator>MOUSHEGIAN, Ken ; ALLEMAN, Andrew ; HARRINGTON, Cormac</creator><creatorcontrib>MOUSHEGIAN, Ken ; ALLEMAN, Andrew ; HARRINGTON, Cormac</creatorcontrib><description>A method for testing linearity of an ADC, comprising receiving a trigger signal indicating an ADC input voltage step adjustment, reading an ADC output sample upon receiving the trigger signal, wherein the ADC output sample has a value range of N integer values that correspond to N discrete ADC output codes, computing a histogram of code occurrences for M consecutive ADC output codes, wherein the histogram comprises M number of bins corresponding to the M consecutive ADC output codes, and wherein M is less than N, updating a DNL value and an INL value according to the histogram at an interval of K number of ADC output sample readings, and shifting the histogram by one ADC output code after updating the DNL and the INL values.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170104&amp;DB=EPODOC&amp;CC=EP&amp;NR=3111559A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170104&amp;DB=EPODOC&amp;CC=EP&amp;NR=3111559A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MOUSHEGIAN, Ken</creatorcontrib><creatorcontrib>ALLEMAN, Andrew</creatorcontrib><creatorcontrib>HARRINGTON, Cormac</creatorcontrib><title>ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEST FOR EMBEDDED DEVICES</title><description>A method for testing linearity of an ADC, comprising receiving a trigger signal indicating an ADC input voltage step adjustment, reading an ADC output sample upon receiving the trigger signal, wherein the ADC output sample has a value range of N integer values that correspond to N discrete ADC output codes, computing a histogram of code occurrences for M consecutive ADC output codes, wherein the histogram comprises M number of bins corresponding to the M consecutive ADC output codes, and wherein M is less than N, updating a DNL value and an INL value according to the histogram at an interval of K number of ADC output sample readings, and shifting the histogram by one ADC output code after updating the DNL and the INL values.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQANAuDqL-w406ZAilg-OZu7YHaVLSo9CpFImTaKH-Py5-gNNb3r7oYjCulR4woI-N0WhIGlH04GIYOSknOCO5C3gJjEl0AuVBoY4JuLsxERMQj-J4OBa7x_Lc8unnoYCa1bUmr-85b-tyz6_8mbkvrbVVdUVb_lG-R-UtPw</recordid><startdate>20170104</startdate><enddate>20170104</enddate><creator>MOUSHEGIAN, Ken</creator><creator>ALLEMAN, Andrew</creator><creator>HARRINGTON, Cormac</creator><scope>EVB</scope></search><sort><creationdate>20170104</creationdate><title>ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEST FOR EMBEDDED DEVICES</title><author>MOUSHEGIAN, Ken ; ALLEMAN, Andrew ; HARRINGTON, Cormac</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3111559A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2017</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>MOUSHEGIAN, Ken</creatorcontrib><creatorcontrib>ALLEMAN, Andrew</creatorcontrib><creatorcontrib>HARRINGTON, Cormac</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MOUSHEGIAN, Ken</au><au>ALLEMAN, Andrew</au><au>HARRINGTON, Cormac</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEST FOR EMBEDDED DEVICES</title><date>2017-01-04</date><risdate>2017</risdate><abstract>A method for testing linearity of an ADC, comprising receiving a trigger signal indicating an ADC input voltage step adjustment, reading an ADC output sample upon receiving the trigger signal, wherein the ADC output sample has a value range of N integer values that correspond to N discrete ADC output codes, computing a histogram of code occurrences for M consecutive ADC output codes, wherein the histogram comprises M number of bins corresponding to the M consecutive ADC output codes, and wherein M is less than N, updating a DNL value and an INL value according to the histogram at an interval of K number of ADC output sample readings, and shifting the histogram by one ADC output code after updating the DNL and the INL values.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP3111559A1
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
ELECTRICITY
title ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEST FOR EMBEDDED DEVICES
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T15%3A24%3A51IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MOUSHEGIAN,%20Ken&rft.date=2017-01-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP3111559A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true