APPARATUS, SYSTEM AND METHOD TO PROVIDE PLATFORM SUPPORT FOR MULTIPLE MEMORY TECHNOLOGIES
Techniques and mechanisms to exchange communications via a printed circuit board (PCB) between a processor device and a memory device. In an embodiment, the processor device is configured based on a memory type of the memory device to an interface mode of multiple interface modes each corresponding...
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| creator | LOOP, Rebecca Z GANGULY, Konika COX, Christopher E MORAN, Brian P LI, Xiang |
| description | Techniques and mechanisms to exchange communications via a printed circuit board (PCB) between a processor device and a memory device. In an embodiment, the processor device is configured based on a memory type of the memory device to an interface mode of multiple interface modes each corresponding to a different respective one of multiple memory standards. A voltage regulator (VR) is programmed, based on the memory type, to a VR mode to provide one or more voltages to the memory device via a hardware interface on the PCB. In another embodiment, x signal lines of an interconnect disposed in or on the PCB are each coupled between the processor device and the memory device to one another. The value x is an integer equal to a total number of signals of a superset of sets of signals each specified by a different respective one of the multiple memory standards. |
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In an embodiment, the processor device is configured based on a memory type of the memory device to an interface mode of multiple interface modes each corresponding to a different respective one of multiple memory standards. A voltage regulator (VR) is programmed, based on the memory type, to a VR mode to provide one or more voltages to the memory device via a hardware interface on the PCB. In another embodiment, x signal lines of an interconnect disposed in or on the PCB are each coupled between the processor device and the memory device to one another. The value x is an integer equal to a total number of signals of a superset of sets of signals each specified by a different respective one of the multiple memory standards.</description><language>eng ; fre ; ger</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200226&DB=EPODOC&CC=EP&NR=3108323B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200226&DB=EPODOC&CC=EP&NR=3108323B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LOOP, Rebecca Z</creatorcontrib><creatorcontrib>GANGULY, Konika</creatorcontrib><creatorcontrib>COX, Christopher E</creatorcontrib><creatorcontrib>MORAN, Brian P</creatorcontrib><creatorcontrib>LI, Xiang</creatorcontrib><title>APPARATUS, SYSTEM AND METHOD TO PROVIDE PLATFORM SUPPORT FOR MULTIPLE MEMORY TECHNOLOGIES</title><description>Techniques and mechanisms to exchange communications via a printed circuit board (PCB) between a processor device and a memory device. In an embodiment, the processor device is configured based on a memory type of the memory device to an interface mode of multiple interface modes each corresponding to a different respective one of multiple memory standards. A voltage regulator (VR) is programmed, based on the memory type, to a VR mode to provide one or more voltages to the memory device via a hardware interface on the PCB. In another embodiment, x signal lines of an interconnect disposed in or on the PCB are each coupled between the processor device and the memory device to one another. The value x is an integer equal to a total number of signals of a superset of sets of signals each specified by a different respective one of the multiple memory standards.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQgOEsDqK-wz2AgjWLa2yvJpD0juQqZCpF4iRaqO-PHXwAp58fvrXKhtlEI33aQ8pJMIDpGggolhoQAo50cw0CeyMtxQCpZ6YosAyE3otjj4sPFDMI1rYjT1eHaatWj_E5l92vGwUtSm0PZXoPZZ7Ge3mVz4Csq-NZn_Sl0n-QL_xaMZY</recordid><startdate>20200226</startdate><enddate>20200226</enddate><creator>LOOP, Rebecca Z</creator><creator>GANGULY, Konika</creator><creator>COX, Christopher E</creator><creator>MORAN, Brian P</creator><creator>LI, Xiang</creator><scope>EVB</scope></search><sort><creationdate>20200226</creationdate><title>APPARATUS, SYSTEM AND METHOD TO PROVIDE PLATFORM SUPPORT FOR MULTIPLE MEMORY TECHNOLOGIES</title><author>LOOP, Rebecca Z ; GANGULY, Konika ; COX, Christopher E ; MORAN, Brian P ; LI, Xiang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3108323B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2020</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>LOOP, Rebecca Z</creatorcontrib><creatorcontrib>GANGULY, Konika</creatorcontrib><creatorcontrib>COX, Christopher E</creatorcontrib><creatorcontrib>MORAN, Brian P</creatorcontrib><creatorcontrib>LI, Xiang</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LOOP, Rebecca Z</au><au>GANGULY, Konika</au><au>COX, Christopher E</au><au>MORAN, Brian P</au><au>LI, Xiang</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>APPARATUS, SYSTEM AND METHOD TO PROVIDE PLATFORM SUPPORT FOR MULTIPLE MEMORY TECHNOLOGIES</title><date>2020-02-26</date><risdate>2020</risdate><abstract>Techniques and mechanisms to exchange communications via a printed circuit board (PCB) between a processor device and a memory device. In an embodiment, the processor device is configured based on a memory type of the memory device to an interface mode of multiple interface modes each corresponding to a different respective one of multiple memory standards. A voltage regulator (VR) is programmed, based on the memory type, to a VR mode to provide one or more voltages to the memory device via a hardware interface on the PCB. In another embodiment, x signal lines of an interconnect disposed in or on the PCB are each coupled between the processor device and the memory device to one another. The value x is an integer equal to a total number of signals of a superset of sets of signals each specified by a different respective one of the multiple memory standards.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng ; fre ; ger |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | APPARATUS, SYSTEM AND METHOD TO PROVIDE PLATFORM SUPPORT FOR MULTIPLE MEMORY TECHNOLOGIES |
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