MEMORY CONFIGURED TO PROVIDE SIMULTANEOUS READ/WRITE ACCESS TO MULTIPLE BANKS

A memory includes at least first and second banks of single-port memory elements, a first local controller adapted to send read and write instructions to the first memory bank, and a second local controller adapted to send read and write instructions to the second memory bank. A global controller is...

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Hauptverfasser:	PARK, Dongkyu, TERZIOGLU, Esin
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	PARK, Dongkyu TERZIOGLU, Esin
description	A memory includes at least first and second banks of single-port memory elements, a first local controller adapted to send read and write instructions to the first memory bank, and a second local controller adapted to send read and write instructions to the second memory bank. A global controller is configured to receive first and second memory addresses and a first indication of an operation to be performed at the first memory addresses and a second indication of an operation to be performed at the second memory address and to instruct the first local controller to perform the first indicated operation at the first memory address and to instruct the second local controller to perform the second indicated operation at the second memory address at the same time.
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language	eng ; fre ; ger
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	MEMORY CONFIGURED TO PROVIDE SIMULTANEOUS READ/WRITE ACCESS TO MULTIPLE BANKS
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