A PANEL WITH ELECTRONIC CIRCUITS AND A SET OF PANELS

A panel comprising electronic circuits connected with each other by connectors. The connected electronic circuits (1a-36a; 1b-36b) form a topology comprising two pseudo-infinite two-dimensional square lattices (S a , S b ) each comprising M*N circuits. The electronic circuits (1a-36a; 1b-36b) are ar...

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Hauptverfasser: KIELBIK, RAFAL, NAPIERALSKI, ANDRZEJ, HALAGAN, KRZYSZTOF, ZATORSKI, WITOLD, ULANSKI, JACEK, PAKULA, TADEUSZ, JUNG, JAROSLAW, POLANOWSKI, PIOTR
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Sprache:eng ; fre ; ger
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creator KIELBIK, RAFAL
NAPIERALSKI, ANDRZEJ
HALAGAN, KRZYSZTOF
ZATORSKI, WITOLD
ULANSKI, JACEK
PAKULA, TADEUSZ
JUNG, JAROSLAW
POLANOWSKI, PIOTR
description A panel comprising electronic circuits connected with each other by connectors. The connected electronic circuits (1a-36a; 1b-36b) form a topology comprising two pseudo-infinite two-dimensional square lattices (S a , S b ) each comprising M*N circuits. The electronic circuits (1a-36a; 1b-36b) are arranged on the panel as a matrix of groups (G 1,1 ; ...; G q,p ) of circuits, the matrix having the number of rows q =N/2 and the number of columns p =M/2, wherein each group (G 1,1 ; ...; G q,p ) comprises 4 circuits of the first lattice (S a ) and 4 circuits of the second lattice (S b ).
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3079071A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3079071A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3079071A13</originalsourceid><addsrcrecordid>eNrjZDBxVAhw9HP1UQj3DPFQcPVxdQ4J8vfzdFZw9gxyDvUMCVZw9HNRcFQIdg1R8HeDqA3mYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgHGBuaWBuaGjobGRCgBADzTJmw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>A PANEL WITH ELECTRONIC CIRCUITS AND A SET OF PANELS</title><source>esp@cenet</source><creator>KIELBIK, RAFAL ; NAPIERALSKI, ANDRZEJ ; HALAGAN, KRZYSZTOF ; ZATORSKI, WITOLD ; ULANSKI, JACEK ; PAKULA, TADEUSZ ; JUNG, JAROSLAW ; POLANOWSKI, PIOTR</creator><creatorcontrib>KIELBIK, RAFAL ; NAPIERALSKI, ANDRZEJ ; HALAGAN, KRZYSZTOF ; ZATORSKI, WITOLD ; ULANSKI, JACEK ; PAKULA, TADEUSZ ; JUNG, JAROSLAW ; POLANOWSKI, PIOTR</creatorcontrib><description>A panel comprising electronic circuits connected with each other by connectors. The connected electronic circuits (1a-36a; 1b-36b) form a topology comprising two pseudo-infinite two-dimensional square lattices (S a , S b ) each comprising M*N circuits. The electronic circuits (1a-36a; 1b-36b) are arranged on the panel as a matrix of groups (G 1,1 ; ...; G q,p ) of circuits, the matrix having the number of rows q =N/2 and the number of columns p =M/2, wherein each group (G 1,1 ; ...; G q,p ) comprises 4 circuits of the first lattice (S a ) and 4 circuits of the second lattice (S b ).</description><language>eng ; fre ; ger</language><subject>CALCULATING ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PHYSICS ; PRINTED CIRCUITS</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20161012&amp;DB=EPODOC&amp;CC=EP&amp;NR=3079071A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20161012&amp;DB=EPODOC&amp;CC=EP&amp;NR=3079071A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KIELBIK, RAFAL</creatorcontrib><creatorcontrib>NAPIERALSKI, ANDRZEJ</creatorcontrib><creatorcontrib>HALAGAN, KRZYSZTOF</creatorcontrib><creatorcontrib>ZATORSKI, WITOLD</creatorcontrib><creatorcontrib>ULANSKI, JACEK</creatorcontrib><creatorcontrib>PAKULA, TADEUSZ</creatorcontrib><creatorcontrib>JUNG, JAROSLAW</creatorcontrib><creatorcontrib>POLANOWSKI, PIOTR</creatorcontrib><title>A PANEL WITH ELECTRONIC CIRCUITS AND A SET OF PANELS</title><description>A panel comprising electronic circuits connected with each other by connectors. The connected electronic circuits (1a-36a; 1b-36b) form a topology comprising two pseudo-infinite two-dimensional square lattices (S a , S b ) each comprising M*N circuits. The electronic circuits (1a-36a; 1b-36b) are arranged on the panel as a matrix of groups (G 1,1 ; ...; G q,p ) of circuits, the matrix having the number of rows q =N/2 and the number of columns p =M/2, wherein each group (G 1,1 ; ...; G q,p ) comprises 4 circuits of the first lattice (S a ) and 4 circuits of the second lattice (S b ).</description><subject>CALCULATING</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBxVAhw9HP1UQj3DPFQcPVxdQ4J8vfzdFZw9gxyDvUMCVZw9HNRcFQIdg1R8HeDqA3mYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgHGBuaWBuaGjobGRCgBADzTJmw</recordid><startdate>20161012</startdate><enddate>20161012</enddate><creator>KIELBIK, RAFAL</creator><creator>NAPIERALSKI, ANDRZEJ</creator><creator>HALAGAN, KRZYSZTOF</creator><creator>ZATORSKI, WITOLD</creator><creator>ULANSKI, JACEK</creator><creator>PAKULA, TADEUSZ</creator><creator>JUNG, JAROSLAW</creator><creator>POLANOWSKI, PIOTR</creator><scope>EVB</scope></search><sort><creationdate>20161012</creationdate><title>A PANEL WITH ELECTRONIC CIRCUITS AND A SET OF PANELS</title><author>KIELBIK, RAFAL ; NAPIERALSKI, ANDRZEJ ; HALAGAN, KRZYSZTOF ; ZATORSKI, WITOLD ; ULANSKI, JACEK ; PAKULA, TADEUSZ ; JUNG, JAROSLAW ; POLANOWSKI, PIOTR</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3079071A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2016</creationdate><topic>CALCULATING</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>KIELBIK, RAFAL</creatorcontrib><creatorcontrib>NAPIERALSKI, ANDRZEJ</creatorcontrib><creatorcontrib>HALAGAN, KRZYSZTOF</creatorcontrib><creatorcontrib>ZATORSKI, WITOLD</creatorcontrib><creatorcontrib>ULANSKI, JACEK</creatorcontrib><creatorcontrib>PAKULA, TADEUSZ</creatorcontrib><creatorcontrib>JUNG, JAROSLAW</creatorcontrib><creatorcontrib>POLANOWSKI, PIOTR</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KIELBIK, RAFAL</au><au>NAPIERALSKI, ANDRZEJ</au><au>HALAGAN, KRZYSZTOF</au><au>ZATORSKI, WITOLD</au><au>ULANSKI, JACEK</au><au>PAKULA, TADEUSZ</au><au>JUNG, JAROSLAW</au><au>POLANOWSKI, PIOTR</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>A PANEL WITH ELECTRONIC CIRCUITS AND A SET OF PANELS</title><date>2016-10-12</date><risdate>2016</risdate><abstract>A panel comprising electronic circuits connected with each other by connectors. The connected electronic circuits (1a-36a; 1b-36b) form a topology comprising two pseudo-infinite two-dimensional square lattices (S a , S b ) each comprising M*N circuits. The electronic circuits (1a-36a; 1b-36b) are arranged on the panel as a matrix of groups (G 1,1 ; ...; G q,p ) of circuits, the matrix having the number of rows q =N/2 and the number of columns p =M/2, wherein each group (G 1,1 ; ...; G q,p ) comprises 4 circuits of the first lattice (S a ) and 4 circuits of the second lattice (S b ).</abstract><oa>free_for_read</oa></addata></record>
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language eng ; fre ; ger
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subjects CALCULATING
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PHYSICS
PRINTED CIRCUITS
title A PANEL WITH ELECTRONIC CIRCUITS AND A SET OF PANELS
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-13T18%3A27%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KIELBIK,%20RAFAL&rft.date=2016-10-12&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP3079071A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true