STATIC DATA BUS ADDRESS ALLOCATION

The present invention relates to a data bus node integrated circuit (1) comprising at least one static address selection terminal (3) and a detecting circuit (4) for detecting a state of the address selection terminal (3). The IC also comprises a communication circuit (5) for data communication over...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	VANDERSTEEGEN, PETER
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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