METHOD OF MANUFACTURING AN ELECTRICAL INTERCONNECT STRUCTURE FOR AN EMBEDDED SEMICONDUCTOR DEVICE PACKAGE

An electronics package includes a first dielectric substrate (34) having a first plurality of vias (50) formed through a thickness thereof, a metalized contact layer (48) coupled to a top surface (40) of the first dielectric substrate (34), and a first die (68) positioned within a first die opening...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MCCONNELEE, Paul Alan, GOWDA, Arun Virupaksha
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES
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