SYSTEMS AND METHODS FOR PROVIDING WAFER ACCESS IN A WAFER PROCESSING SYSTEM

Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further ma...

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Hauptverfasser: FEHRMANN, FRANK, HIRSCHFELD, BOTHO, KANEV, STOJAN
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creator FEHRMANN, FRANK
HIRSCHFELD, BOTHO
KANEV, STOJAN
description Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2939256A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2939256A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2939256A13</originalsourceid><addsrcrecordid>eNrjZPAOjgwOcfUNVnD0c1HwdQ3x8HcJVnDzD1IICPIP83Tx9HNXCHd0cw1ScHR2dg0OVvD0U3CEigBVgIRASiCG8DCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSSeNcAI0tjSyNTM0dDYyKUAAAzFS1Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SYSTEMS AND METHODS FOR PROVIDING WAFER ACCESS IN A WAFER PROCESSING SYSTEM</title><source>esp@cenet</source><creator>FEHRMANN, FRANK ; HIRSCHFELD, BOTHO ; KANEV, STOJAN</creator><creatorcontrib>FEHRMANN, FRANK ; HIRSCHFELD, BOTHO ; KANEV, STOJAN</creatorcontrib><description>Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20151104&amp;DB=EPODOC&amp;CC=EP&amp;NR=2939256A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20151104&amp;DB=EPODOC&amp;CC=EP&amp;NR=2939256A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FEHRMANN, FRANK</creatorcontrib><creatorcontrib>HIRSCHFELD, BOTHO</creatorcontrib><creatorcontrib>KANEV, STOJAN</creatorcontrib><title>SYSTEMS AND METHODS FOR PROVIDING WAFER ACCESS IN A WAFER PROCESSING SYSTEM</title><description>Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAOjgwOcfUNVnD0c1HwdQ3x8HcJVnDzD1IICPIP83Tx9HNXCHd0cw1ScHR2dg0OVvD0U3CEigBVgIRASiCG8DCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSSeNcAI0tjSyNTM0dDYyKUAAAzFS1Q</recordid><startdate>20151104</startdate><enddate>20151104</enddate><creator>FEHRMANN, FRANK</creator><creator>HIRSCHFELD, BOTHO</creator><creator>KANEV, STOJAN</creator><scope>EVB</scope></search><sort><creationdate>20151104</creationdate><title>SYSTEMS AND METHODS FOR PROVIDING WAFER ACCESS IN A WAFER PROCESSING SYSTEM</title><author>FEHRMANN, FRANK ; HIRSCHFELD, BOTHO ; KANEV, STOJAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2939256A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FEHRMANN, FRANK</creatorcontrib><creatorcontrib>HIRSCHFELD, BOTHO</creatorcontrib><creatorcontrib>KANEV, STOJAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FEHRMANN, FRANK</au><au>HIRSCHFELD, BOTHO</au><au>KANEV, STOJAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SYSTEMS AND METHODS FOR PROVIDING WAFER ACCESS IN A WAFER PROCESSING SYSTEM</title><date>2015-11-04</date><risdate>2015</risdate><abstract>Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SYSTEMS AND METHODS FOR PROVIDING WAFER ACCESS IN A WAFER PROCESSING SYSTEM
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T14%3A30%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=FEHRMANN,%20FRANK&rft.date=2015-11-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP2939256A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true