System and method for manfacturing a fabricated carrier

System and method for manfacturing a fabricated carrier

A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact isla...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: CHEUNG, KA WA
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHEUNG, KA WA
description A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2881978A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2881978A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2881978A13</originalsourceid><addsrcrecordid>eNrjZDAPriwuSc1VSMxLUchNLcnIT1FIyy9SyE3MS0tMLiktysxLV0hUSEtMKspMTixJTVFITiwqykwt4mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BRhYWhpbmFo6GxkQoAQBuoC2J</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System and method for manfacturing a fabricated carrier</title><source>esp@cenet</source><creator>CHEUNG, KA WA</creator><creatorcontrib>CHEUNG, KA WA</creatorcontrib><description>A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150610&amp;DB=EPODOC&amp;CC=EP&amp;NR=2881978A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150610&amp;DB=EPODOC&amp;CC=EP&amp;NR=2881978A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHEUNG, KA WA</creatorcontrib><title>System and method for manfacturing a fabricated carrier</title><description>A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPriwuSc1VSMxLUchNLcnIT1FIyy9SyE3MS0tMLiktysxLV0hUSEtMKspMTixJTVFITiwqykwt4mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BRhYWhpbmFo6GxkQoAQBuoC2J</recordid><startdate>20150610</startdate><enddate>20150610</enddate><creator>CHEUNG, KA WA</creator><scope>EVB</scope></search><sort><creationdate>20150610</creationdate><title>System and method for manfacturing a fabricated carrier</title><author>CHEUNG, KA WA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2881978A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHEUNG, KA WA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHEUNG, KA WA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System and method for manfacturing a fabricated carrier</title><date>2015-06-10</date><risdate>2015</risdate><abstract>A method and apparatus for fabricating a carrier having a top surface and a bottom surface, the method comprising combining a conductive portion at the top surface and a dielectric at the bottom surface, wherein the dielectric includes contact island cavities, filling one or more of the contact island cavities with solder metal to form solder islands, selectively metal plating the conductive portion, selectively etching a portion of the conductive portion, and applying solder resist to the selectively plated and etched top surface of said conductive portion.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP2881978A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title System and method for manfacturing a fabricated carrier
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-19T18%3A27%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHEUNG,%20KA%20WA&rft.date=2015-06-10&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP2881978A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true