SHORT CIRCUIT REDUCTION IN A FERROELECTRIC MEMORY CELL COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE
A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the el...
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| creator | NILSSON, Jakob KARLSSON, Christer BRÖMS, Per HAGEL, Olle Jonny |
| description | A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes. |
| format | Patent |
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The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INFORMATION STORAGE ; INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER ; PHYSICS ; SEMICONDUCTOR DEVICES ; STATIC STORES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20181017&DB=EPODOC&CC=EP&NR=2724342B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20181017&DB=EPODOC&CC=EP&NR=2724342B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NILSSON, Jakob</creatorcontrib><creatorcontrib>KARLSSON, Christer</creatorcontrib><creatorcontrib>BRÖMS, Per</creatorcontrib><creatorcontrib>HAGEL, Olle Jonny</creatorcontrib><title>SHORT CIRCUIT REDUCTION IN A FERROELECTRIC MEMORY CELL COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE</title><description>A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). 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The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng ; fre ; ger |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER PHYSICS SEMICONDUCTOR DEVICES STATIC STORES |
| title | SHORT CIRCUIT REDUCTION IN A FERROELECTRIC MEMORY CELL COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE |
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