AN APPARATUS AND METHOD FOR INTRODUCING A CONTROLLABLE DELAY TO AN INPUT SIGNAL

An apparatus including a first electrode portion configured to inject charge carriers; a second electrode portion configured to collect charge carriers and provide an output signal; a third electrode portion configured to collect charge carriers and provide an output signal; a monolithic semiconduct...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	PASANEN, PIRJO, MARJAANA, ERMOLOV, VLADIMIR, ALEXSANDROVICH, HELLE, MERI, SARI, OKSANEN, MARKKU, ANTTONI, SEPPÄLÄ, EIRA, TUULIA
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS MANUFACTURE OR TREATMENT OF NANOSTRUCTURES MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES NANOTECHNOLOGY PERFORMING OPERATIONS RESONATORS SEMICONDUCTOR DEVICES SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES TRANSPORTING
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Beschreibung
Zusammenfassung:	An apparatus including a first electrode portion configured to inject charge carriers; a second electrode portion configured to collect charge carriers and provide an output signal; a third electrode portion configured to collect charge carriers and provide an output signal; a monolithic semiconductor, providing a first channel for the transport of injected charge carriers between the first electrode portion and the second electrode portion and providing a second channel for the transport of injected charge carriers between the first electrode portion and the third electrode portion, wherein the first channel is configured such that a charge carrier injected at the first electrode portion will reach the second electrode portion via the first channel after a first transport time and the second channel is configured such that a charge carrier injected at the first electrode portion will reach the third electrode portion via the second channel after a second transport time greater than the first transport time; and at least one gate electrode coupled to the monolithic semiconductor configured to enable switching a route for charge carrier transport between at least the first channel and the second channel.