FIELD EFFECT TRANSISTOR DEVICES WITH LOW SOURCE RESISTANCE

A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel reg...

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Hauptverfasser: CHENG, Lin, DHAR, Sarit, RYU, Sei-Hyung, CAPELL, Doyle Craig, JONAS, Charlotte, AGARWAL, Anant, PALMOUR, John
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creator CHENG, Lin
DHAR, Sarit
RYU, Sei-Hyung
CAPELL, Doyle Craig
JONAS, Charlotte
AGARWAL, Anant
PALMOUR, John
description A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2705527B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2705527B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2705527B13</originalsourceid><addsrcrecordid>eNrjZLBy83T1cVFwdXNzdQ5RCAly9Av2DA7xD1JwcQ3zdHYNVgj3DPFQ8PEPVwj2Dw1ydlUIcgUpcPRzduVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGuAUbmBqamRuZOhsZEKAEAbssowA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>FIELD EFFECT TRANSISTOR DEVICES WITH LOW SOURCE RESISTANCE</title><source>esp@cenet</source><creator>CHENG, Lin ; DHAR, Sarit ; RYU, Sei-Hyung ; CAPELL, Doyle Craig ; JONAS, Charlotte ; AGARWAL, Anant ; PALMOUR, John</creator><creatorcontrib>CHENG, Lin ; DHAR, Sarit ; RYU, Sei-Hyung ; CAPELL, Doyle Craig ; JONAS, Charlotte ; AGARWAL, Anant ; PALMOUR, John</creatorcontrib><description>A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190227&amp;DB=EPODOC&amp;CC=EP&amp;NR=2705527B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190227&amp;DB=EPODOC&amp;CC=EP&amp;NR=2705527B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHENG, Lin</creatorcontrib><creatorcontrib>DHAR, Sarit</creatorcontrib><creatorcontrib>RYU, Sei-Hyung</creatorcontrib><creatorcontrib>CAPELL, Doyle Craig</creatorcontrib><creatorcontrib>JONAS, Charlotte</creatorcontrib><creatorcontrib>AGARWAL, Anant</creatorcontrib><creatorcontrib>PALMOUR, John</creatorcontrib><title>FIELD EFFECT TRANSISTOR DEVICES WITH LOW SOURCE RESISTANCE</title><description>A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLBy83T1cVFwdXNzdQ5RCAly9Av2DA7xD1JwcQ3zdHYNVgj3DPFQ8PEPVwj2Dw1ydlUIcgUpcPRzduVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGuAUbmBqamRuZOhsZEKAEAbssowA</recordid><startdate>20190227</startdate><enddate>20190227</enddate><creator>CHENG, Lin</creator><creator>DHAR, Sarit</creator><creator>RYU, Sei-Hyung</creator><creator>CAPELL, Doyle Craig</creator><creator>JONAS, Charlotte</creator><creator>AGARWAL, Anant</creator><creator>PALMOUR, John</creator><scope>EVB</scope></search><sort><creationdate>20190227</creationdate><title>FIELD EFFECT TRANSISTOR DEVICES WITH LOW SOURCE RESISTANCE</title><author>CHENG, Lin ; DHAR, Sarit ; RYU, Sei-Hyung ; CAPELL, Doyle Craig ; JONAS, Charlotte ; AGARWAL, Anant ; PALMOUR, John</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2705527B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHENG, Lin</creatorcontrib><creatorcontrib>DHAR, Sarit</creatorcontrib><creatorcontrib>RYU, Sei-Hyung</creatorcontrib><creatorcontrib>CAPELL, Doyle Craig</creatorcontrib><creatorcontrib>JONAS, Charlotte</creatorcontrib><creatorcontrib>AGARWAL, Anant</creatorcontrib><creatorcontrib>PALMOUR, John</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHENG, Lin</au><au>DHAR, Sarit</au><au>RYU, Sei-Hyung</au><au>CAPELL, Doyle Craig</au><au>JONAS, Charlotte</au><au>AGARWAL, Anant</au><au>PALMOUR, John</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>FIELD EFFECT TRANSISTOR DEVICES WITH LOW SOURCE RESISTANCE</title><date>2019-02-27</date><risdate>2019</risdate><abstract>A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title FIELD EFFECT TRANSISTOR DEVICES WITH LOW SOURCE RESISTANCE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T10%3A51%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHENG,%20Lin&rft.date=2019-02-27&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP2705527B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true