THROUGH-SUBSTRATE VIA AND REDISTRIBUTION LAYER WITH METAL PASTE

A semiconductor device and a method for manufacturing such semiconductor device for use in a stacked configuration of the semiconductor device are disclosed. The semiconductor device includes a substrate including at least part of an electronic circuit provided at a first side thereof. The substrate...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: ROOZEBOOM, Freddy, VAN GRUNSVEN, Eric Cornelis Egbertus, SANDERS, Franciscus Hubertus Marie, BURGHOORN, Maria Mathea Antonetta
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator ROOZEBOOM, Freddy
VAN GRUNSVEN, Eric Cornelis Egbertus
SANDERS, Franciscus Hubertus Marie
BURGHOORN, Maria Mathea Antonetta
description A semiconductor device and a method for manufacturing such semiconductor device for use in a stacked configuration of the semiconductor device are disclosed. The semiconductor device includes a substrate including at least part of an electronic circuit provided at a first side thereof. The substrate includes a passivation layer and a substrate via that extends from the first side to a via depth such that it is reconfigurable into a through-substrate. The semiconductor device further includes a patterned masking layer on the first side of the substrate. The patterned masking layer includes a trench extending fully through the patterned masking layer. The trench has been filled with a redistribution conductor. The substrate via and the redistribution conductor include metal paste and together form one piece, such that there is no physical interface between the through-substrate via and the redistribution conductor. Thus, the parasitic resistance of this electrical connection is reduced.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2351077B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2351077B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2351077B13</originalsourceid><addsrcrecordid>eNrjZLAP8QjyD3X30A0OdQoOCXIMcVUI83RUcPRzUQhydfEECnk6hYZ4-vsp-DhGugYphHuGeCj4uoY4-igEOAaHuPIwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUknjXACNjU0MDc3MnQ2MilAAAVmwqQA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>THROUGH-SUBSTRATE VIA AND REDISTRIBUTION LAYER WITH METAL PASTE</title><source>esp@cenet</source><creator>ROOZEBOOM, Freddy ; VAN GRUNSVEN, Eric Cornelis Egbertus ; SANDERS, Franciscus Hubertus Marie ; BURGHOORN, Maria Mathea Antonetta</creator><creatorcontrib>ROOZEBOOM, Freddy ; VAN GRUNSVEN, Eric Cornelis Egbertus ; SANDERS, Franciscus Hubertus Marie ; BURGHOORN, Maria Mathea Antonetta</creatorcontrib><description>A semiconductor device and a method for manufacturing such semiconductor device for use in a stacked configuration of the semiconductor device are disclosed. The semiconductor device includes a substrate including at least part of an electronic circuit provided at a first side thereof. The substrate includes a passivation layer and a substrate via that extends from the first side to a via depth such that it is reconfigurable into a through-substrate. The semiconductor device further includes a patterned masking layer on the first side of the substrate. The patterned masking layer includes a trench extending fully through the patterned masking layer. The trench has been filled with a redistribution conductor. The substrate via and the redistribution conductor include metal paste and together form one piece, such that there is no physical interface between the through-substrate via and the redistribution conductor. Thus, the parasitic resistance of this electrical connection is reduced.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170301&amp;DB=EPODOC&amp;CC=EP&amp;NR=2351077B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170301&amp;DB=EPODOC&amp;CC=EP&amp;NR=2351077B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ROOZEBOOM, Freddy</creatorcontrib><creatorcontrib>VAN GRUNSVEN, Eric Cornelis Egbertus</creatorcontrib><creatorcontrib>SANDERS, Franciscus Hubertus Marie</creatorcontrib><creatorcontrib>BURGHOORN, Maria Mathea Antonetta</creatorcontrib><title>THROUGH-SUBSTRATE VIA AND REDISTRIBUTION LAYER WITH METAL PASTE</title><description>A semiconductor device and a method for manufacturing such semiconductor device for use in a stacked configuration of the semiconductor device are disclosed. The semiconductor device includes a substrate including at least part of an electronic circuit provided at a first side thereof. The substrate includes a passivation layer and a substrate via that extends from the first side to a via depth such that it is reconfigurable into a through-substrate. The semiconductor device further includes a patterned masking layer on the first side of the substrate. The patterned masking layer includes a trench extending fully through the patterned masking layer. The trench has been filled with a redistribution conductor. The substrate via and the redistribution conductor include metal paste and together form one piece, such that there is no physical interface between the through-substrate via and the redistribution conductor. Thus, the parasitic resistance of this electrical connection is reduced.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAP8QjyD3X30A0OdQoOCXIMcVUI83RUcPRzUQhydfEECnk6hYZ4-vsp-DhGugYphHuGeCj4uoY4-igEOAaHuPIwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUknjXACNjU0MDc3MnQ2MilAAAVmwqQA</recordid><startdate>20170301</startdate><enddate>20170301</enddate><creator>ROOZEBOOM, Freddy</creator><creator>VAN GRUNSVEN, Eric Cornelis Egbertus</creator><creator>SANDERS, Franciscus Hubertus Marie</creator><creator>BURGHOORN, Maria Mathea Antonetta</creator><scope>EVB</scope></search><sort><creationdate>20170301</creationdate><title>THROUGH-SUBSTRATE VIA AND REDISTRIBUTION LAYER WITH METAL PASTE</title><author>ROOZEBOOM, Freddy ; VAN GRUNSVEN, Eric Cornelis Egbertus ; SANDERS, Franciscus Hubertus Marie ; BURGHOORN, Maria Mathea Antonetta</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2351077B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ROOZEBOOM, Freddy</creatorcontrib><creatorcontrib>VAN GRUNSVEN, Eric Cornelis Egbertus</creatorcontrib><creatorcontrib>SANDERS, Franciscus Hubertus Marie</creatorcontrib><creatorcontrib>BURGHOORN, Maria Mathea Antonetta</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ROOZEBOOM, Freddy</au><au>VAN GRUNSVEN, Eric Cornelis Egbertus</au><au>SANDERS, Franciscus Hubertus Marie</au><au>BURGHOORN, Maria Mathea Antonetta</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>THROUGH-SUBSTRATE VIA AND REDISTRIBUTION LAYER WITH METAL PASTE</title><date>2017-03-01</date><risdate>2017</risdate><abstract>A semiconductor device and a method for manufacturing such semiconductor device for use in a stacked configuration of the semiconductor device are disclosed. The semiconductor device includes a substrate including at least part of an electronic circuit provided at a first side thereof. The substrate includes a passivation layer and a substrate via that extends from the first side to a via depth such that it is reconfigurable into a through-substrate. The semiconductor device further includes a patterned masking layer on the first side of the substrate. The patterned masking layer includes a trench extending fully through the patterned masking layer. The trench has been filled with a redistribution conductor. The substrate via and the redistribution conductor include metal paste and together form one piece, such that there is no physical interface between the through-substrate via and the redistribution conductor. Thus, the parasitic resistance of this electrical connection is reduced.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP2351077B1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title THROUGH-SUBSTRATE VIA AND REDISTRIBUTION LAYER WITH METAL PASTE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T09%3A22%3A52IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=ROOZEBOOM,%20Freddy&rft.date=2017-03-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP2351077B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true