POWER-AWARE THREAD SCHEDULING AND DYNAMIC USE OF PROCESSORS

Techniques and apparatuses for providing power-aware thread scheduling and dynamic use of processors are disclosed. In some aspects, a multi-core system is monitored to determine core activity. The core activity may be compared to a power policy that balances a power savings plan with a performance...

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Hauptverfasser:	KISHAN, Arun U, JUDGE, Nicholas S, RITZ, Andrew J, MARSHALL, Allen, DENG, Yimin
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	KISHAN, Arun U JUDGE, Nicholas S RITZ, Andrew J MARSHALL, Allen DENG, Yimin
description	Techniques and apparatuses for providing power-aware thread scheduling and dynamic use of processors are disclosed. In some aspects, a multi-core system is monitored to determine core activity. The core activity may be compared to a power policy that balances a power savings plan with a performance plan. One or more of the cores may be parked in response to the comparison to reduce power consumption by the multi-core system. In additional aspects, the power-aware scheduling may be performed during a predetermined interval to dynamically park or unpark cores. Further aspects include adjusting the power state of unparked cores in response to the comparison of the core activity and power policy.
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	POWER-AWARE THREAD SCHEDULING AND DYNAMIC USE OF PROCESSORS
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