PLASMA DISPLAY PANEL

PLASMA DISPLAY PANEL

A plasma display panel is formed of front panel (2) and rear panel (10). Front panel (2) includes glass substrate (3) on which display electrodes (6) are formed, dielectric layer (8) covering display electrodes (6), and protective layer (9) formed on dielectric layer (8). Rear panel (10) confronts f...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: AOTO, KOJI, MIZOKAMI, KANAME, HORIKAWA, KEIJI
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
ELECTRICITY
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator AOTO, KOJI
MIZOKAMI, KANAME
HORIKAWA, KEIJI
description A plasma display panel is formed of front panel (2) and rear panel (10). Front panel (2) includes glass substrate (3) on which display electrodes (6) are formed, dielectric layer (8) covering display electrodes (6), and protective layer (9) formed on dielectric layer (8). Rear panel (10) confronts front panel (2) to form discharge space (16) therebetween, and includes address electrodes (12) formed along a direction intersecting with display electrodes (6), primary dielectric layer (13) covering address electrodes (12), and barrier ribs (14) formed on primary dielectric layer (13) for partitioning discharge space (16). Protective layer (9) includes a primary film made of metal oxide and formed on dielectric layer (8), and an aggregated particle formed of several crystal particles aggregated together and made of metal oxide and attached to the primary film. A percentage of voids of primary dielectric layer (13) falls within a range from 2% to 20%.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2128884A4</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2128884A4</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2128884A43</originalsourceid><addsrcrecordid>eNrjZBAJ8HEM9nVUcPEMBrIiFQIc_Vx9eBhY0xJzilN5oTQ3g4Kba4izh25qQX58anFBYnJqXmpJvGuAkaGRhYWFiaOJMRFKADgUHi8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PLASMA DISPLAY PANEL</title><source>esp@cenet</source><creator>AOTO, KOJI ; MIZOKAMI, KANAME ; HORIKAWA, KEIJI</creator><creatorcontrib>AOTO, KOJI ; MIZOKAMI, KANAME ; HORIKAWA, KEIJI</creatorcontrib><description>A plasma display panel is formed of front panel (2) and rear panel (10). Front panel (2) includes glass substrate (3) on which display electrodes (6) are formed, dielectric layer (8) covering display electrodes (6), and protective layer (9) formed on dielectric layer (8). Rear panel (10) confronts front panel (2) to form discharge space (16) therebetween, and includes address electrodes (12) formed along a direction intersecting with display electrodes (6), primary dielectric layer (13) covering address electrodes (12), and barrier ribs (14) formed on primary dielectric layer (13) for partitioning discharge space (16). Protective layer (9) includes a primary film made of metal oxide and formed on dielectric layer (8), and an aggregated particle formed of several crystal particles aggregated together and made of metal oxide and attached to the primary film. A percentage of voids of primary dielectric layer (13) falls within a range from 2% to 20%.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ; ELECTRICITY</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110608&amp;DB=EPODOC&amp;CC=EP&amp;NR=2128884A4$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110608&amp;DB=EPODOC&amp;CC=EP&amp;NR=2128884A4$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AOTO, KOJI</creatorcontrib><creatorcontrib>MIZOKAMI, KANAME</creatorcontrib><creatorcontrib>HORIKAWA, KEIJI</creatorcontrib><title>PLASMA DISPLAY PANEL</title><description>A plasma display panel is formed of front panel (2) and rear panel (10). Front panel (2) includes glass substrate (3) on which display electrodes (6) are formed, dielectric layer (8) covering display electrodes (6), and protective layer (9) formed on dielectric layer (8). Rear panel (10) confronts front panel (2) to form discharge space (16) therebetween, and includes address electrodes (12) formed along a direction intersecting with display electrodes (6), primary dielectric layer (13) covering address electrodes (12), and barrier ribs (14) formed on primary dielectric layer (13) for partitioning discharge space (16). Protective layer (9) includes a primary film made of metal oxide and formed on dielectric layer (8), and an aggregated particle formed of several crystal particles aggregated together and made of metal oxide and attached to the primary film. A percentage of voids of primary dielectric layer (13) falls within a range from 2% to 20%.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJ8HEM9nVUcPEMBrIiFQIc_Vx9eBhY0xJzilN5oTQ3g4Kba4izh25qQX58anFBYnJqXmpJvGuAkaGRhYWFiaOJMRFKADgUHi8</recordid><startdate>20110608</startdate><enddate>20110608</enddate><creator>AOTO, KOJI</creator><creator>MIZOKAMI, KANAME</creator><creator>HORIKAWA, KEIJI</creator><scope>EVB</scope></search><sort><creationdate>20110608</creationdate><title>PLASMA DISPLAY PANEL</title><author>AOTO, KOJI ; MIZOKAMI, KANAME ; HORIKAWA, KEIJI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2128884A43</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2011</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>AOTO, KOJI</creatorcontrib><creatorcontrib>MIZOKAMI, KANAME</creatorcontrib><creatorcontrib>HORIKAWA, KEIJI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>AOTO, KOJI</au><au>MIZOKAMI, KANAME</au><au>HORIKAWA, KEIJI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PLASMA DISPLAY PANEL</title><date>2011-06-08</date><risdate>2011</risdate><abstract>A plasma display panel is formed of front panel (2) and rear panel (10). Front panel (2) includes glass substrate (3) on which display electrodes (6) are formed, dielectric layer (8) covering display electrodes (6), and protective layer (9) formed on dielectric layer (8). Rear panel (10) confronts front panel (2) to form discharge space (16) therebetween, and includes address electrodes (12) formed along a direction intersecting with display electrodes (6), primary dielectric layer (13) covering address electrodes (12), and barrier ribs (14) formed on primary dielectric layer (13) for partitioning discharge space (16). Protective layer (9) includes a primary film made of metal oxide and formed on dielectric layer (8), and an aggregated particle formed of several crystal particles aggregated together and made of metal oxide and attached to the primary film. A percentage of voids of primary dielectric layer (13) falls within a range from 2% to 20%.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP2128884A4
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
ELECTRICITY
title PLASMA DISPLAY PANEL
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T14%3A17%3A22IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=AOTO,%20KOJI&rft.date=2011-06-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP2128884A4%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true