METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES
A method of packaging a plurality of semiconductor chips comprises: providing a substrate panel having a first coefficient of thermal expansion (CTE); providing a carrier having a second CTE that is less than the first CTE; heating the substrate panel and the carrier to first and second elevated tem...
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Patent |
| Sprache: | eng ; fre ; ger |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | McLELLAN, Neil CHAN, Vincent TOPACIO, Roden |
| description | A method of packaging a plurality of semiconductor chips comprises: providing a substrate panel having a first coefficient of thermal expansion (CTE); providing a carrier having a second CTE that is less than the first CTE; heating the substrate panel and the carrier to first and second elevated temperatures respectively; mounting the substrate panel at about the first elevated temperature to the carrier, the carrier being at said second elevated temperature, to provide a connection between the carrier and the substrate panel; and cooling the carrier and the substrate panel from the first and second elevated temperatures thereby putting the substrate panel into tension in at least one direction. A stiffener panel may be affixed to the substrate panel and heated to an elevated temperature and while the substrate panel is heated to an elevated temperature. A plurality of dies may be mounted and electrically connected to the substrate panel. Under-filling of the plurality of dies may occur with the stiffener panel affixed to the substrate panel. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2057672B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2057672B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2057672B13</originalsourceid><addsrcrecordid>eNrjZDDzdQ3x8HdRcPQD4oAAxyDHkNBgBTf_IAVfR29PP3eFYFdfT2d_P5dQ5xCgYICjs7eju2swDwNrWmJOcSovlOZmUHBzDXH20E0tyI9PLS5ITE7NSy2Jdw0wMjA1NzM3cjI0JkIJAMCzJ4I</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES</title><source>esp@cenet</source><creator>McLELLAN, Neil ; CHAN, Vincent ; TOPACIO, Roden</creator><creatorcontrib>McLELLAN, Neil ; CHAN, Vincent ; TOPACIO, Roden</creatorcontrib><description>A method of packaging a plurality of semiconductor chips comprises: providing a substrate panel having a first coefficient of thermal expansion (CTE); providing a carrier having a second CTE that is less than the first CTE; heating the substrate panel and the carrier to first and second elevated temperatures respectively; mounting the substrate panel at about the first elevated temperature to the carrier, the carrier being at said second elevated temperature, to provide a connection between the carrier and the substrate panel; and cooling the carrier and the substrate panel from the first and second elevated temperatures thereby putting the substrate panel into tension in at least one direction. A stiffener panel may be affixed to the substrate panel and heated to an elevated temperature and while the substrate panel is heated to an elevated temperature. A plurality of dies may be mounted and electrically connected to the substrate panel. Under-filling of the plurality of dies may occur with the stiffener panel affixed to the substrate panel.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200603&DB=EPODOC&CC=EP&NR=2057672B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200603&DB=EPODOC&CC=EP&NR=2057672B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>McLELLAN, Neil</creatorcontrib><creatorcontrib>CHAN, Vincent</creatorcontrib><creatorcontrib>TOPACIO, Roden</creatorcontrib><title>METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES</title><description>A method of packaging a plurality of semiconductor chips comprises: providing a substrate panel having a first coefficient of thermal expansion (CTE); providing a carrier having a second CTE that is less than the first CTE; heating the substrate panel and the carrier to first and second elevated temperatures respectively; mounting the substrate panel at about the first elevated temperature to the carrier, the carrier being at said second elevated temperature, to provide a connection between the carrier and the substrate panel; and cooling the carrier and the substrate panel from the first and second elevated temperatures thereby putting the substrate panel into tension in at least one direction. A stiffener panel may be affixed to the substrate panel and heated to an elevated temperature and while the substrate panel is heated to an elevated temperature. A plurality of dies may be mounted and electrically connected to the substrate panel. Under-filling of the plurality of dies may occur with the stiffener panel affixed to the substrate panel.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDzdQ3x8HdRcPQD4oAAxyDHkNBgBTf_IAVfR29PP3eFYFdfT2d_P5dQ5xCgYICjs7eju2swDwNrWmJOcSovlOZmUHBzDXH20E0tyI9PLS5ITE7NSy2Jdw0wMjA1NzM3cjI0JkIJAMCzJ4I</recordid><startdate>20200603</startdate><enddate>20200603</enddate><creator>McLELLAN, Neil</creator><creator>CHAN, Vincent</creator><creator>TOPACIO, Roden</creator><scope>EVB</scope></search><sort><creationdate>20200603</creationdate><title>METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES</title><author>McLELLAN, Neil ; CHAN, Vincent ; TOPACIO, Roden</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2057672B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>McLELLAN, Neil</creatorcontrib><creatorcontrib>CHAN, Vincent</creatorcontrib><creatorcontrib>TOPACIO, Roden</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>McLELLAN, Neil</au><au>CHAN, Vincent</au><au>TOPACIO, Roden</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES</title><date>2020-06-03</date><risdate>2020</risdate><abstract>A method of packaging a plurality of semiconductor chips comprises: providing a substrate panel having a first coefficient of thermal expansion (CTE); providing a carrier having a second CTE that is less than the first CTE; heating the substrate panel and the carrier to first and second elevated temperatures respectively; mounting the substrate panel at about the first elevated temperature to the carrier, the carrier being at said second elevated temperature, to provide a connection between the carrier and the substrate panel; and cooling the carrier and the substrate panel from the first and second elevated temperatures thereby putting the substrate panel into tension in at least one direction. A stiffener panel may be affixed to the substrate panel and heated to an elevated temperature and while the substrate panel is heated to an elevated temperature. A plurality of dies may be mounted and electrically connected to the substrate panel. Under-filling of the plurality of dies may occur with the stiffener panel affixed to the substrate panel.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng ; fre ; ger |
| recordid | cdi_epo_espacenet_EP2057672B1 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T08%3A24%3A58IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=McLELLAN,%20Neil&rft.date=2020-06-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP2057672B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |