Clock data recovery with selectable phase control

A clock data recovery (CDR) circuit to recover a clock signal and data signal from an input signal. The CDR circuit includes a control circuit; a select circuit and a phase adjust circuit. The control circuit generates a first control signal according to a phase relationship between the input signal...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Wei, Jason, C, Chang, Kun-Yung, K, Perino, Donald, V
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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