MICROFLUID EJECTION DEVICE HAVING EFFICIENT LOGIC AND DRIVER CIRCUITRY
A semiconductor substrate for a microfluid ejection head. The substrate includes a plurality of fluid ejection actuators disposed on the substrate. A plurality of driver transistors are disposed on the substrate for driving the plurality of fluid ejection actuators. Each of the driver transistors ha...
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creator | ROWE, KRISTI, MAGGARD EDELEN, JOHN, GLENN PARISH, GEORGE, KEITH |
description | A semiconductor substrate for a microfluid ejection head. The substrate includes a plurality of fluid ejection actuators disposed on the substrate. A plurality of driver transistors are disposed on the substrate for driving the plurality of fluid ejection actuators. Each of the driver transistors have an active area ranging from about 1000 to less than about 15,000 mum2. A plurality of logic circuits including at least one logic transistor are coupled to the driver transistors. The driver and logic transistors are provided by a high density array of MOS transistors wherein at least the logic transistors have a gate length of from about 0.1 to less than about 3 microns. |
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The substrate includes a plurality of fluid ejection actuators disposed on the substrate. A plurality of driver transistors are disposed on the substrate for driving the plurality of fluid ejection actuators. Each of the driver transistors have an active area ranging from about 1000 to less than about 15,000 mum2. A plurality of logic circuits including at least one logic transistor are coupled to the driver transistors. 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The substrate includes a plurality of fluid ejection actuators disposed on the substrate. A plurality of driver transistors are disposed on the substrate for driving the plurality of fluid ejection actuators. Each of the driver transistors have an active area ranging from about 1000 to less than about 15,000 mum2. A plurality of logic circuits including at least one logic transistor are coupled to the driver transistors. The driver and logic transistors are provided by a high density array of MOS transistors wherein at least the logic transistors have a gate length of from about 0.1 to less than about 3 microns.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CORRECTION OF TYPOGRAPHICAL ERRORS i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME LINING MACHINES PERFORMING OPERATIONS PRINTING SELECTIVE PRINTING MECHANISMS STAMPS TRANSPORTING TYPEWRITERS |
title | MICROFLUID EJECTION DEVICE HAVING EFFICIENT LOGIC AND DRIVER CIRCUITRY |
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