Substrate manufacturing method and circuit board
A laminating step includes a second step of laminating a second insulation layer (30) on a conductive pattern last formed at a first step, roughening the surface (30a) of the laminated second insulation layer (30) excluding a desired area (S=302), and forming a conductive layer (21) on at least the...
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| creator | KOIDE, MASATERU |
| description | A laminating step includes a second step of laminating a second insulation layer (30) on a conductive pattern last formed at a first step, roughening the surface (30a) of the laminated second insulation layer (30) excluding a desired area (S=302), and forming a conductive layer (21) on at least the desired area (S), and forming a third insulating layer (60) on at least the desired area (S) of the surface of the second insulation layer (30), and a processing step includes a removing step of removing an upper part (R) of the area higher than the second insulation layer (30) on the substrate obtained at the laminating step, and an exposing step of exposing a part (25) of the area of a conductive pattern adjacent to the lower side of the second insulation layer (30). |
| format | Patent |
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fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150506&DB=EPODOC&CC=EP&NR=1635625B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150506&DB=EPODOC&CC=EP&NR=1635625B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KOIDE, MASATERU</creatorcontrib><title>Substrate manufacturing method and circuit board</title><description>A laminating step includes a second step of laminating a second insulation layer (30) on a conductive pattern last formed at a first step, roughening the surface (30a) of the laminated second insulation layer (30) excluding a desired area (S=302), and forming a conductive layer (21) on at least the desired area (S), and forming a third insulating layer (60) on at least the desired area (S) of the surface of the second insulation layer (30), and a processing step includes a removing step of removing an upper part (R) of the area higher than the second insulation layer (30) on the substrate obtained at the laminating step, and an exposing step of exposing a part (25) of the area of a conductive pattern adjacent to the lower side of the second insulation layer (30).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAILk0qLilKLElVyE3MK01LTC4pLcrMS1fITS3JyE9RSMxLUUjOLEouzSxRSMpPLErhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgGGZsamZkamTobGRCgBADeZKzk</recordid><startdate>20150506</startdate><enddate>20150506</enddate><creator>KOIDE, MASATERU</creator><scope>EVB</scope></search><sort><creationdate>20150506</creationdate><title>Substrate manufacturing method and circuit board</title><author>KOIDE, MASATERU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP1635625B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; 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| language | eng ; fre ; ger |
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| subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
| title | Substrate manufacturing method and circuit board |
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