IMAGE SENSOR WITH DIGITAL FRAME STORE
A photodetecting circuit is disclosed. The photodetecting circuit includes a photodetector, a storage node with first and second node terminals, a transfer transistor disposed intermediate the first node terminal of the storage node and the photodetector for electrically connecting the first node te...
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creator | SILVERBROOK, KIA UNDERWOOD, MATTHEW J LAPSTUN, PAUL RIDLEY, NICHOLAS D HENDERSON, PETER C.B YOURLO, ZHENYA A MOINI, ALIREZA |
description | A photodetecting circuit is disclosed. The photodetecting circuit includes a photodetector, a storage node with first and second node terminals, a transfer transistor disposed intermediate the first node terminal of the storage node and the photodetector for electrically connecting the first node terminal and the photodetector upon receiving a transfer signal to a gate of the transfer transistor, a reset transistor disposed intermediate a reset voltage node and the first node terminal of the storage node for electrically connecting the first node terminal to the reset voltage node upon receiving a reset signal to a gate of the reset transistor, and an output circuit for generating an output signal based on a voltage at the first terminal. First the reset signal is applied, followed by the transfer signal. Next, a compensation signal is applied at the second terminal of the storage node. The compensation signal increases the voltage at the first terminal whilst the output circuit generates the output signal. The compensation signal is a logically negated version of the transfer signal. |
format | Patent |
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The photodetecting circuit includes a photodetector, a storage node with first and second node terminals, a transfer transistor disposed intermediate the first node terminal of the storage node and the photodetector for electrically connecting the first node terminal and the photodetector upon receiving a transfer signal to a gate of the transfer transistor, a reset transistor disposed intermediate a reset voltage node and the first node terminal of the storage node for electrically connecting the first node terminal to the reset voltage node upon receiving a reset signal to a gate of the reset transistor, and an output circuit for generating an output signal based on a voltage at the first terminal. First the reset signal is applied, followed by the transfer signal. Next, a compensation signal is applied at the second terminal of the storage node. The compensation signal increases the voltage at the first terminal whilst the output circuit generates the output signal. The compensation signal is a logically negated version of the transfer signal.</description><edition>7</edition><language>eng ; fre ; ger</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070418&DB=EPODOC&CC=EP&NR=1597913A4$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070418&DB=EPODOC&CC=EP&NR=1597913A4$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SILVERBROOK, KIA</creatorcontrib><creatorcontrib>UNDERWOOD, MATTHEW J</creatorcontrib><creatorcontrib>LAPSTUN, PAUL</creatorcontrib><creatorcontrib>RIDLEY, NICHOLAS D</creatorcontrib><creatorcontrib>HENDERSON, PETER C.B</creatorcontrib><creatorcontrib>YOURLO, ZHENYA A</creatorcontrib><creatorcontrib>MOINI, ALIREZA</creatorcontrib><title>IMAGE SENSOR WITH DIGITAL FRAME STORE</title><description>A photodetecting circuit is disclosed. The photodetecting circuit includes a photodetector, a storage node with first and second node terminals, a transfer transistor disposed intermediate the first node terminal of the storage node and the photodetector for electrically connecting the first node terminal and the photodetector upon receiving a transfer signal to a gate of the transfer transistor, a reset transistor disposed intermediate a reset voltage node and the first node terminal of the storage node for electrically connecting the first node terminal to the reset voltage node upon receiving a reset signal to a gate of the reset transistor, and an output circuit for generating an output signal based on a voltage at the first terminal. First the reset signal is applied, followed by the transfer signal. Next, a compensation signal is applied at the second terminal of the storage node. The compensation signal increases the voltage at the first terminal whilst the output circuit generates the output signal. The compensation signal is a logically negated version of the transfer signal.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD19HV0d1UIdvUL9g9SCPcM8VBw8XT3DHH0UXALcvQFyoT4B7nyMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JJ41wBDU0tzS0NjRxNjIpQAAE32Is8</recordid><startdate>20070418</startdate><enddate>20070418</enddate><creator>SILVERBROOK, KIA</creator><creator>UNDERWOOD, MATTHEW J</creator><creator>LAPSTUN, PAUL</creator><creator>RIDLEY, NICHOLAS D</creator><creator>HENDERSON, PETER C.B</creator><creator>YOURLO, ZHENYA A</creator><creator>MOINI, ALIREZA</creator><scope>EVB</scope></search><sort><creationdate>20070418</creationdate><title>IMAGE SENSOR WITH DIGITAL FRAME STORE</title><author>SILVERBROOK, KIA ; UNDERWOOD, MATTHEW J ; LAPSTUN, PAUL ; RIDLEY, NICHOLAS D ; HENDERSON, PETER C.B ; YOURLO, ZHENYA A ; MOINI, ALIREZA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP1597913A43</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2007</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><toplevel>online_resources</toplevel><creatorcontrib>SILVERBROOK, KIA</creatorcontrib><creatorcontrib>UNDERWOOD, MATTHEW J</creatorcontrib><creatorcontrib>LAPSTUN, PAUL</creatorcontrib><creatorcontrib>RIDLEY, NICHOLAS D</creatorcontrib><creatorcontrib>HENDERSON, PETER C.B</creatorcontrib><creatorcontrib>YOURLO, ZHENYA A</creatorcontrib><creatorcontrib>MOINI, ALIREZA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SILVERBROOK, KIA</au><au>UNDERWOOD, MATTHEW J</au><au>LAPSTUN, PAUL</au><au>RIDLEY, NICHOLAS D</au><au>HENDERSON, PETER C.B</au><au>YOURLO, ZHENYA A</au><au>MOINI, ALIREZA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>IMAGE SENSOR WITH DIGITAL FRAME STORE</title><date>2007-04-18</date><risdate>2007</risdate><abstract>A photodetecting circuit is disclosed. The photodetecting circuit includes a photodetector, a storage node with first and second node terminals, a transfer transistor disposed intermediate the first node terminal of the storage node and the photodetector for electrically connecting the first node terminal and the photodetector upon receiving a transfer signal to a gate of the transfer transistor, a reset transistor disposed intermediate a reset voltage node and the first node terminal of the storage node for electrically connecting the first node terminal to the reset voltage node upon receiving a reset signal to a gate of the reset transistor, and an output circuit for generating an output signal based on a voltage at the first terminal. First the reset signal is applied, followed by the transfer signal. Next, a compensation signal is applied at the second terminal of the storage node. The compensation signal increases the voltage at the first terminal whilst the output circuit generates the output signal. The compensation signal is a logically negated version of the transfer signal.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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language | eng ; fre ; ger |
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subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PICTORIAL COMMUNICATION, e.g. TELEVISION |
title | IMAGE SENSOR WITH DIGITAL FRAME STORE |
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