Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device
A semiconductor device comprises a face-up active element (e.g. integrated circuit chip (30B)) and a face-up passive element (e.g. capacitor (10)), covered with insulation layer(s) (11, 21) formed on a silicon substrate (1); a wiring in form of a conductive layer (25) on the insulating layer; and at...
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description | A semiconductor device comprises a face-up active element (e.g. integrated circuit chip (30B)) and a face-up passive element (e.g. capacitor (10)), covered with insulation layer(s) (11, 21) formed on a silicon substrate (1); a wiring in form of a conductive layer (25) on the insulating layer; and at least one element connected to the wiring through the insulating layer via conductor plugs (16) in insulating layer. The device further comprises an external connecting electrode on the insulating layer. An independent claim is included for the manufacture of the semiconductor device. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP1492166B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP1492166B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP1492166B13</originalsourceid><addsrcrecordid>eNqNjbsKAjEURNNYiPoP9wPWIioLtsqKpaD9ckkmu0GTLHn4_WbB0sJqijlnZinMHc6q4HVROUTSeFuFhiZWTx5AKcdalAjKIyKCaYi9Joc8Bk2mGo59MTwz1g8zRenH4losDL8SNt9cCbp0j_N1iyn0SPUOHrnvbvJw3Mm2Pcn9H8gHOnM_wQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device</title><source>esp@cenet</source><creator>YAMAGATA, OSAMU</creator><creatorcontrib>YAMAGATA, OSAMU</creatorcontrib><description>A semiconductor device comprises a face-up active element (e.g. integrated circuit chip (30B)) and a face-up passive element (e.g. capacitor (10)), covered with insulation layer(s) (11, 21) formed on a silicon substrate (1); a wiring in form of a conductive layer (25) on the insulating layer; and at least one element connected to the wiring through the insulating layer via conductor plugs (16) in insulating layer. The device further comprises an external connecting electrode on the insulating layer. An independent claim is included for the manufacture of the semiconductor device.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160907&DB=EPODOC&CC=EP&NR=1492166B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160907&DB=EPODOC&CC=EP&NR=1492166B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YAMAGATA, OSAMU</creatorcontrib><title>Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device</title><description>A semiconductor device comprises a face-up active element (e.g. integrated circuit chip (30B)) and a face-up passive element (e.g. capacitor (10)), covered with insulation layer(s) (11, 21) formed on a silicon substrate (1); a wiring in form of a conductive layer (25) on the insulating layer; and at least one element connected to the wiring through the insulating layer via conductor plugs (16) in insulating layer. The device further comprises an external connecting electrode on the insulating layer. An independent claim is included for the manufacture of the semiconductor device.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjbsKAjEURNNYiPoP9wPWIioLtsqKpaD9ckkmu0GTLHn4_WbB0sJqijlnZinMHc6q4HVROUTSeFuFhiZWTx5AKcdalAjKIyKCaYi9Joc8Bk2mGo59MTwz1g8zRenH4losDL8SNt9cCbp0j_N1iyn0SPUOHrnvbvJw3Mm2Pcn9H8gHOnM_wQ</recordid><startdate>20160907</startdate><enddate>20160907</enddate><creator>YAMAGATA, OSAMU</creator><scope>EVB</scope></search><sort><creationdate>20160907</creationdate><title>Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device</title><author>YAMAGATA, OSAMU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP1492166B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2016</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YAMAGATA, OSAMU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAMAGATA, OSAMU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device</title><date>2016-09-07</date><risdate>2016</risdate><abstract>A semiconductor device comprises a face-up active element (e.g. integrated circuit chip (30B)) and a face-up passive element (e.g. capacitor (10)), covered with insulation layer(s) (11, 21) formed on a silicon substrate (1); a wiring in form of a conductive layer (25) on the insulating layer; and at least one element connected to the wiring through the insulating layer via conductor plugs (16) in insulating layer. The device further comprises an external connecting electrode on the insulating layer. An independent claim is included for the manufacture of the semiconductor device.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device |
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