Pipelining access to serialization tokens on a bus

Apparatus and methods are disclosed herein that provide reduced bus transaction latency on a bus architecture that includes at least one master coupled to a plurality of slaves. As disclosed herein, a device (e.g., a slave) may include bus logic (55) and host logic (57) coupled to the bus logic. The...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: BADI, ERIC, ZHANG, JONATHAN Y, NYCHKA, ROBERT J.P
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:Apparatus and methods are disclosed herein that provide reduced bus transaction latency on a bus architecture that includes at least one master coupled to a plurality of slaves. As disclosed herein, a device (e.g., a slave) may include bus logic (55) and host logic (57) coupled to the bus logic. The bus logic (55) may obtain a serialization token permitting the host logic (57) to complete a transaction received by the bus logic via the bus. Further, the bus logic may keep the serialization token to complete at least one other transaction.