DYNAMICALLY RECONFIGURABLE DATA SPACE

A processor is provided that has a data memory that may be addressed as a dual memory space in one mode and as a single linear memory space in another mode. The memory may permit dual concurrent operand fetches from the data memory when DSP instructions are processed. The memory may then dynamically...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: PYSKA, MICHAEL, CONNER, JOSHUA, M, TRIECE, JOSEPH, W, CATHERWOOD, MICHAEL
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
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