PROCESS FOR THE FABRICATION OF MOSFET DEPLETION DEVICES, SILICIDED SOURCE AND DRAIN JUNCTIONS

PROCESS FOR THE FABRICATION OF MOSFET DEPLETION DEVICES, SILICIDED SOURCE AND DRAIN JUNCTIONS

A sub-0.1 mum MOSFET device having minimum poly depletion, salicided source and drain junctions and very low sheet resistance poly-gates is provided utilizing a damascene-gate process wherein the source and drain implantation activation annealing and silicidation occurs in the presence of a dummy ga...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: BOYD, DIANE, CATHERINE, HANAFI, HUSSEIN, IBRAHIM, ROY, RONNEN, ANDREW, BRODSKY, STEPHEN, BRUCE
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A sub-0.1 mum MOSFET device having minimum poly depletion, salicided source and drain junctions and very low sheet resistance poly-gates is provided utilizing a damascene-gate process wherein the source and drain implantation activation annealing and silicidation occurs in the presence of a dummy gate region which is thereafter removed and replaced with a polysilicon gate region.