MEMORY DEVICE WITH SUPPORT FOR UNALIGNED ACCESS

An integrated memory comprises a plurality of data lines and a plurality of decoders being associated to each data line. Each data line can address a single memory cell or a plurality of memory cells. Also, each data line can be either a word line or a bit line of a memory. Each decoder generates an...

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Bibliographische Detailangaben
Hauptverfasser: REZARD, VINCENT, FLECK, ROD, G, RANDHAWA, SABEEN, OBERLAENDER, KLAUS
Format: Patent
Sprache:eng ; fre ; ger
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