INTEGRATED CIRCUIT PACKAGE HAVING A SUBSTRATE VENT HOLE

The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrat...

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Hauptverfasser: MAHAJAN, RAVI, V, RAMALINGAM, SURESH, VODRAHALLI, NAGESH, COSTELLO, MICHAEL, J, LOKE, MUN, LEONG
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creator MAHAJAN, RAVI, V
RAMALINGAM, SURESH
VODRAHALLI, NAGESH
COSTELLO, MICHAEL, J
LOKE, MUN, LEONG
description The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP1186212B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP1186212B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP1186212B13</originalsourceid><addsrcrecordid>eNrjZDD39AtxdQ9yDHF1UXD2DHIO9QxRCHB09nZ0d1XwcAzz9HNXcFQIDnUKDgGpUQhz9QtR8PD3ceVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGuAYaGFmZGhkZOhsZEKAEA3YMnmA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INTEGRATED CIRCUIT PACKAGE HAVING A SUBSTRATE VENT HOLE</title><source>esp@cenet</source><creator>MAHAJAN, RAVI, V ; RAMALINGAM, SURESH ; VODRAHALLI, NAGESH ; COSTELLO, MICHAEL, J ; LOKE, MUN, LEONG</creator><creatorcontrib>MAHAJAN, RAVI, V ; RAMALINGAM, SURESH ; VODRAHALLI, NAGESH ; COSTELLO, MICHAEL, J ; LOKE, MUN, LEONG</creatorcontrib><description>The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20060215&amp;DB=EPODOC&amp;CC=EP&amp;NR=1186212B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20060215&amp;DB=EPODOC&amp;CC=EP&amp;NR=1186212B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MAHAJAN, RAVI, V</creatorcontrib><creatorcontrib>RAMALINGAM, SURESH</creatorcontrib><creatorcontrib>VODRAHALLI, NAGESH</creatorcontrib><creatorcontrib>COSTELLO, MICHAEL, J</creatorcontrib><creatorcontrib>LOKE, MUN, LEONG</creatorcontrib><title>INTEGRATED CIRCUIT PACKAGE HAVING A SUBSTRATE VENT HOLE</title><description>The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDD39AtxdQ9yDHF1UXD2DHIO9QxRCHB09nZ0d1XwcAzz9HNXcFQIDnUKDgGpUQhz9QtR8PD3ceVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGuAYaGFmZGhkZOhsZEKAEA3YMnmA</recordid><startdate>20060215</startdate><enddate>20060215</enddate><creator>MAHAJAN, RAVI, V</creator><creator>RAMALINGAM, SURESH</creator><creator>VODRAHALLI, NAGESH</creator><creator>COSTELLO, MICHAEL, J</creator><creator>LOKE, MUN, LEONG</creator><scope>EVB</scope></search><sort><creationdate>20060215</creationdate><title>INTEGRATED CIRCUIT PACKAGE HAVING A SUBSTRATE VENT HOLE</title><author>MAHAJAN, RAVI, V ; RAMALINGAM, SURESH ; VODRAHALLI, NAGESH ; COSTELLO, MICHAEL, J ; LOKE, MUN, LEONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP1186212B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2006</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MAHAJAN, RAVI, V</creatorcontrib><creatorcontrib>RAMALINGAM, SURESH</creatorcontrib><creatorcontrib>VODRAHALLI, NAGESH</creatorcontrib><creatorcontrib>COSTELLO, MICHAEL, J</creatorcontrib><creatorcontrib>LOKE, MUN, LEONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MAHAJAN, RAVI, V</au><au>RAMALINGAM, SURESH</au><au>VODRAHALLI, NAGESH</au><au>COSTELLO, MICHAEL, J</au><au>LOKE, MUN, LEONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT PACKAGE HAVING A SUBSTRATE VENT HOLE</title><date>2006-02-15</date><risdate>2006</risdate><abstract>The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.</abstract><oa>free_for_read</oa></addata></record>
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language eng ; fre ; ger
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subjects BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
title INTEGRATED CIRCUIT PACKAGE HAVING A SUBSTRATE VENT HOLE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T03%3A05%3A43IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MAHAJAN,%20RAVI,%20V&rft.date=2006-02-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP1186212B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true