Trench gate MIS device and method of fabricating the same

In a trench-gated MIS semiconductor device (20), a plug of undoped polysilicon (22) is deposited at the bottom of the trench (18) to protect the gate oxide (15,21) in this area against the high electric fields that can occur in this area. The plug may be formed over a thick oxide layer (31) at the bottom of the trench. A process of fabricating the MOSFET includes the steps of growing a thick oxide layer (410) on the sidewalls and bottom of the trench (408), depositing a polysilicon layer (412) which remains undoped, etching the polysilicon layer to form the plug (414), etching the exposed portion of the thick oxide layer, growing a gate oxide layer (416) and an oxide layer (418) over the plug, and depositing and doping a polysilicon layer (420) which serves as the gate electrode. In an alternative embodiment, the oxide layer (418) overlying the plug is etched before the gate polysilicon (420) is deposited such that the dopant introduced into the gate polysilicon migrates into the polysilicon plug (414). In this embodiment, the polysilicon plug is in electrical contact with the gate polysilicon layer and is separated from the drain (402) by the thick oxide layer (410).