METHOD AND APPARATUS FOR MINIMIZING SEMICONDUCTOR WAFER ARCING DURING SEMICONDUCTOR WAFER PROCESSING

A method and apparatus for minimizing or eliminating arcing or dielectric breakdown across a wafer during a semiconductor wafer processing step includes controlling the voltage across the wafer so that arcing and/or dielectric breakdown does not occur. Using an electrostatic clamp of the invention a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MEYER, JOHN, A, ATHAVALE, SATISH, D, JERDE, LESLIE, G
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PLASMA TECHNIQUE PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OFNEUTRONS PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMICBEAMS SEMICONDUCTOR DEVICES TESTING
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