Memory mapping mechanism for a digital processing system

Memory mapping mechanism for a digital processing system

A digital signal processing system includes first and second logical memory mapping units coupled to first and second digital processors respectively and to a data storage unit. The system further includes first and second mapping registers for containing first and second address mapping information...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ARIAS, DERRICK LINCOLN, SINIBALDI, JOHN CLAUDE, ANDREWS, LAWRENCE PAUL, ORTEGA, OSCAR EMILIO, LINGER, JUDITH MARIE, MANDALIA, BAIJU DHIRAJLAL
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
SELECTING
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Beschreibung
Zusammenfassung:A digital signal processing system includes first and second logical memory mapping units coupled to first and second digital processors respectively and to a data storage unit. The system further includes first and second mapping registers for containing first and second address mapping information coupled to the first and second digital processors respectively. The first and second mapping units are operative to receive (i) first and second logical addresses generated by the first and second digital processors respectively and (ii) first and second address mapping information respectively, and generate first and second physical addresses such that each of the digital processors can independently access any of a plurality of memory locations within the data storage unit.