Structure and fabrication of power MOSFETs, including termination structure
A power MOSFET is created from a semiconductor body (2000 and 2001) having a main active area and a peripheral termination area. A first insulating layer (2002) of substantially uniform thickness lies over the active and termination areas. A main polycrystalline portion (2003A/2003B) lies over the f...
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| creator | CHANG, MIKE CHEN, JUN WEI HSHIEH, FWU-IUAN PITZER, DORMAN C VAN DER LINDE, JAN OWYANG, KING |
| description | A power MOSFET is created from a semiconductor body (2000 and 2001) having a main active area and a peripheral termination area. A first insulating layer (2002) of substantially uniform thickness lies over the active and termination areas. A main polycrystalline portion (2003A/2003B) lies over the first insulating layer largely above the active area. First and second peripheral polycrystalline segments (2003C1 and 2003C2) lie over the first insulating layer above the termination area. A gate electrode (2016) contacts the main polycrystalline portion. A source electrode (2015A/2015B) contacts the active area, the termination area, and the first polycrystalline segment. An optional additional metal portion (2019) contacts the second polycrystalline segment. The MOSFET is typically created by a five-mask process. A defreckle etch is performed subsequent to metal deposition and patterning to define the two peripheral polycrystalline segments. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP0635888A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP0635888A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP0635888A13</originalsourceid><addsrcrecordid>eNrjZPAOLikqTS4pLUpVSMxLUUhLTCrKTE4syczPU8hPUyjIL08tUvD1D3ZzDSnWUcjMS84pTcnMS1coSS3KzcyDqCuGmcDDwJqWmFOcyguluRkUgPqcPXRTC_LjU4sLEpNT81JL4l0DDMyMTS0sLBwNjYlQAgD0zTUz</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Structure and fabrication of power MOSFETs, including termination structure</title><source>esp@cenet</source><creator>CHANG, MIKE ; CHEN, JUN WEI ; HSHIEH, FWU-IUAN ; PITZER, DORMAN C ; VAN DER LINDE, JAN ; OWYANG, KING</creator><creatorcontrib>CHANG, MIKE ; CHEN, JUN WEI ; HSHIEH, FWU-IUAN ; PITZER, DORMAN C ; VAN DER LINDE, JAN ; OWYANG, KING</creatorcontrib><description>A power MOSFET is created from a semiconductor body (2000 and 2001) having a main active area and a peripheral termination area. A first insulating layer (2002) of substantially uniform thickness lies over the active and termination areas. A main polycrystalline portion (2003A/2003B) lies over the first insulating layer largely above the active area. First and second peripheral polycrystalline segments (2003C1 and 2003C2) lie over the first insulating layer above the termination area. A gate electrode (2016) contacts the main polycrystalline portion. A source electrode (2015A/2015B) contacts the active area, the termination area, and the first polycrystalline segment. An optional additional metal portion (2019) contacts the second polycrystalline segment. The MOSFET is typically created by a five-mask process. A defreckle etch is performed subsequent to metal deposition and patterning to define the two peripheral polycrystalline segments.</description><edition>6</edition><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1995</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950125&DB=EPODOC&CC=EP&NR=0635888A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950125&DB=EPODOC&CC=EP&NR=0635888A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHANG, MIKE</creatorcontrib><creatorcontrib>CHEN, JUN WEI</creatorcontrib><creatorcontrib>HSHIEH, FWU-IUAN</creatorcontrib><creatorcontrib>PITZER, DORMAN C</creatorcontrib><creatorcontrib>VAN DER LINDE, JAN</creatorcontrib><creatorcontrib>OWYANG, KING</creatorcontrib><title>Structure and fabrication of power MOSFETs, including termination structure</title><description>A power MOSFET is created from a semiconductor body (2000 and 2001) having a main active area and a peripheral termination area. A first insulating layer (2002) of substantially uniform thickness lies over the active and termination areas. A main polycrystalline portion (2003A/2003B) lies over the first insulating layer largely above the active area. First and second peripheral polycrystalline segments (2003C1 and 2003C2) lie over the first insulating layer above the termination area. A gate electrode (2016) contacts the main polycrystalline portion. A source electrode (2015A/2015B) contacts the active area, the termination area, and the first polycrystalline segment. An optional additional metal portion (2019) contacts the second polycrystalline segment. The MOSFET is typically created by a five-mask process. A defreckle etch is performed subsequent to metal deposition and patterning to define the two peripheral polycrystalline segments.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1995</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAOLikqTS4pLUpVSMxLUUhLTCrKTE4syczPU8hPUyjIL08tUvD1D3ZzDSnWUcjMS84pTcnMS1coSS3KzcyDqCuGmcDDwJqWmFOcyguluRkUgPqcPXRTC_LjU4sLEpNT81JL4l0DDMyMTS0sLBwNjYlQAgD0zTUz</recordid><startdate>19950125</startdate><enddate>19950125</enddate><creator>CHANG, MIKE</creator><creator>CHEN, JUN WEI</creator><creator>HSHIEH, FWU-IUAN</creator><creator>PITZER, DORMAN C</creator><creator>VAN DER LINDE, JAN</creator><creator>OWYANG, KING</creator><scope>EVB</scope></search><sort><creationdate>19950125</creationdate><title>Structure and fabrication of power MOSFETs, including termination structure</title><author>CHANG, MIKE ; CHEN, JUN WEI ; HSHIEH, FWU-IUAN ; PITZER, DORMAN C ; VAN DER LINDE, JAN ; OWYANG, KING</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP0635888A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>1995</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHANG, MIKE</creatorcontrib><creatorcontrib>CHEN, JUN WEI</creatorcontrib><creatorcontrib>HSHIEH, FWU-IUAN</creatorcontrib><creatorcontrib>PITZER, DORMAN C</creatorcontrib><creatorcontrib>VAN DER LINDE, JAN</creatorcontrib><creatorcontrib>OWYANG, KING</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHANG, MIKE</au><au>CHEN, JUN WEI</au><au>HSHIEH, FWU-IUAN</au><au>PITZER, DORMAN C</au><au>VAN DER LINDE, JAN</au><au>OWYANG, KING</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Structure and fabrication of power MOSFETs, including termination structure</title><date>1995-01-25</date><risdate>1995</risdate><abstract>A power MOSFET is created from a semiconductor body (2000 and 2001) having a main active area and a peripheral termination area. A first insulating layer (2002) of substantially uniform thickness lies over the active and termination areas. A main polycrystalline portion (2003A/2003B) lies over the first insulating layer largely above the active area. First and second peripheral polycrystalline segments (2003C1 and 2003C2) lie over the first insulating layer above the termination area. A gate electrode (2016) contacts the main polycrystalline portion. A source electrode (2015A/2015B) contacts the active area, the termination area, and the first polycrystalline segment. An optional additional metal portion (2019) contacts the second polycrystalline segment. The MOSFET is typically created by a five-mask process. A defreckle etch is performed subsequent to metal deposition and patterning to define the two peripheral polycrystalline segments.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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| title | Structure and fabrication of power MOSFETs, including termination structure |
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