Adiabatic dynamic precharge boost circuitry

Power dissipation in precharge paths used in adiabatic dynamic logic circuitry is reduced by a precharge boost circuit (124,126) which decreases the impedance between a clock node (120) and an output node (122) in such logic circuitry and thereby increases the charging current from clock signal gene...

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Bibliographische Detailangaben
1. Verfasser: DENKER, JOHN STEWART
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:Power dissipation in precharge paths used in adiabatic dynamic logic circuitry is reduced by a precharge boost circuit (124,126) which decreases the impedance between a clock node (120) and an output node (122) in such logic circuitry and thereby increases the charging current from clock signal generator ( PHI 0). In one example, a diode (124) used to precharge an output node in adiabatic dynamic logic circuitry is selectively shorted by a controllable switch (126) selectively connected in parallel with the diode when the output node is to be precharged.