System and method for peripheral data transfer

A system and method for increasing the rate of data transfer from a host computer to a peripheral such as a printer without the need for special hardware within the host computer or a special interface cable coupling the host computer to the peripheral. Data is transferred from the host computer to...

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1. Verfasser: VOTH, DAVID W
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description A system and method for increasing the rate of data transfer from a host computer to a peripheral such as a printer without the need for special hardware within the host computer or a special interface cable coupling the host computer to the peripheral. Data is transferred from the host computer to the peripheral in 4 Kbyte bursts. Handshaking occurs between the host computer and the peripheral only between bursts. Bytes of peripheral data are apportioned into multiple bytes of data within the host computer. The multiple bytes are transmitted from the host computer to the peripheral, each transmitted byte containing a data clock and several bits of peripheral data. In one embodiment, the peripheral data byte is apportioned into two bytes within the host computer with each byte having a pair of clock signals transmitted along with the peripheral data portion. In another embodiment, three bytes of peripheral data are apportioned into four bytes within the host computer with each byte having a single clock signal transmitted along with the peripheral data portion. Within the peripheral, a clock circuit detects the clock signal from each transmitted byte and generates a delayed signal to latch peripheral data bytes into a storage register. In addition, the first transmitted byte contains a flag to signal the peripheral that the data that follows is RLE compressed data. Parity bits are also included in the transmitted data. The system can be easily implemented on any Centronics compatible printer system to increase the rate of data transfer.
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Data is transferred from the host computer to the peripheral in 4 Kbyte bursts. Handshaking occurs between the host computer and the peripheral only between bursts. Bytes of peripheral data are apportioned into multiple bytes of data within the host computer. The multiple bytes are transmitted from the host computer to the peripheral, each transmitted byte containing a data clock and several bits of peripheral data. In one embodiment, the peripheral data byte is apportioned into two bytes within the host computer with each byte having a pair of clock signals transmitted along with the peripheral data portion. In another embodiment, three bytes of peripheral data are apportioned into four bytes within the host computer with each byte having a single clock signal transmitted along with the peripheral data portion. Within the peripheral, a clock circuit detects the clock signal from each transmitted byte and generates a delayed signal to latch peripheral data bytes into a storage register. In addition, the first transmitted byte contains a flag to signal the peripheral that the data that follows is RLE compressed data. Parity bits are also included in the transmitted data. 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Data is transferred from the host computer to the peripheral in 4 Kbyte bursts. Handshaking occurs between the host computer and the peripheral only between bursts. Bytes of peripheral data are apportioned into multiple bytes of data within the host computer. The multiple bytes are transmitted from the host computer to the peripheral, each transmitted byte containing a data clock and several bits of peripheral data. In one embodiment, the peripheral data byte is apportioned into two bytes within the host computer with each byte having a pair of clock signals transmitted along with the peripheral data portion. In another embodiment, three bytes of peripheral data are apportioned into four bytes within the host computer with each byte having a single clock signal transmitted along with the peripheral data portion. Within the peripheral, a clock circuit detects the clock signal from each transmitted byte and generates a delayed signal to latch peripheral data bytes into a storage register. In addition, the first transmitted byte contains a flag to signal the peripheral that the data that follows is RLE compressed data. Parity bits are also included in the transmitted data. The system can be easily implemented on any Centronics compatible printer system to increase the rate of data transfer.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record>
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language eng ; fre ; ger
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title System and method for peripheral data transfer
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