Programming a field programmable gate array and reading array status

The present invention is used in an FPGA device having programmable logic cells and a programmable interconnect array. In a preferred embodiment in which the logic cells are programmed using transistors controlled by memory cells and the interconnect structure is programmed using antifuses, a config...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: GOETTING, F. ERICH
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
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