Multichip integrated circuit packages and systems

Multichip integrated circuit packages and systems of multichip packages having reduced interconnecting lead lengths are disclosed. The multichip package (30) includes a multiplicity of semiconductor chip layers (34) laminated together in a unitized module (32). A first metallization (36) pattern is connected to the integrated circuit chips on at least one side surface of the unitized module. In addition, at least one end surface of the module contains a second metallization pattern which is configured to facilitate connection of the package to an external signal source, such as another multichip package (52,70). The system includes at least two such packages which are electrically coupled via either metallization patterns provided on the end surface of the packages. If required, a plurality of multichip packages can be directly coupled into the system in an analogous manner. Further specific details of the multichip package and the system of multichip packages are set forth herein.