Voltage source amplifier
A transmitter for converting a binary digital signal into a pseudo-ternary signal at first and second output nodes (40, 41) to form differential output voltages includes a current source amplifier circuit (10), a first voltage source amplifier circuit (12), and a second voltage source amplifier circ...
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| creator | PETERSON, JOE WILLIAM BREHMER, GEOFFREY EMIL |
| description | A transmitter for converting a binary digital signal into a pseudo-ternary signal at first and second output nodes (40, 41) to form differential output voltages includes a current source amplifier circuit (10), a first voltage source amplifier circuit (12), and a second voltage source amplifier circuit (14). The current source amplifier circuit (10) is responsive to a reference current for generating a first drive current and a second drive current. The first voltage source amplifier circuit (12) is responsive to a reference voltage, a first digital control signal, a second digital control signal and the first drive current for driving the first output node (40) to the reference voltage when the second digital control signal is at a high logic level and for driving the first output node (40) to a ground potential when the first digital control signal is at a high logic level. The second voltage source amplifier circuit (14) is responsive to the reference voltage, first digital control signal, second digital control signal, and sec and drive current for driving the second output node (41) to the reference voltage when the first digital control signal is at a high logic level and for driving the second output mace (41) to the ground potential when the second digital control signal is at a high logic level. The transmitter has been designed so as to overcome the problem of line clamping during a power-dawn condition, provides a current limiting function, and reduces the ringing problem associated with driving an inductive load with a high impedance source. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP0534575B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP0534575B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP0534575B13</originalsourceid><addsrcrecordid>eNrjZJAIy88pSUxPVSjOLy1KTlVIzC3IyUzLTC3iYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgEGpsYmpuamTobGRCgBAL2qIf8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Voltage source amplifier</title><source>esp@cenet</source><creator>PETERSON, JOE WILLIAM ; BREHMER, GEOFFREY EMIL</creator><creatorcontrib>PETERSON, JOE WILLIAM ; BREHMER, GEOFFREY EMIL</creatorcontrib><description>A transmitter for converting a binary digital signal into a pseudo-ternary signal at first and second output nodes (40, 41) to form differential output voltages includes a current source amplifier circuit (10), a first voltage source amplifier circuit (12), and a second voltage source amplifier circuit (14). The current source amplifier circuit (10) is responsive to a reference current for generating a first drive current and a second drive current. The first voltage source amplifier circuit (12) is responsive to a reference voltage, a first digital control signal, a second digital control signal and the first drive current for driving the first output node (40) to the reference voltage when the second digital control signal is at a high logic level and for driving the first output node (40) to a ground potential when the first digital control signal is at a high logic level. The second voltage source amplifier circuit (14) is responsive to the reference voltage, first digital control signal, second digital control signal, and sec and drive current for driving the second output node (41) to the reference voltage when the first digital control signal is at a high logic level and for driving the second output mace (41) to the ground potential when the second digital control signal is at a high logic level. The transmitter has been designed so as to overcome the problem of line clamping during a power-dawn condition, provides a current limiting function, and reduces the ringing problem associated with driving an inductive load with a high impedance source.</description><edition>6</edition><language>eng ; fre ; ger</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; PULSE TECHNIQUE ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>1997</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19970709&DB=EPODOC&CC=EP&NR=0534575B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19970709&DB=EPODOC&CC=EP&NR=0534575B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PETERSON, JOE WILLIAM</creatorcontrib><creatorcontrib>BREHMER, GEOFFREY EMIL</creatorcontrib><title>Voltage source amplifier</title><description>A transmitter for converting a binary digital signal into a pseudo-ternary signal at first and second output nodes (40, 41) to form differential output voltages includes a current source amplifier circuit (10), a first voltage source amplifier circuit (12), and a second voltage source amplifier circuit (14). The current source amplifier circuit (10) is responsive to a reference current for generating a first drive current and a second drive current. The first voltage source amplifier circuit (12) is responsive to a reference voltage, a first digital control signal, a second digital control signal and the first drive current for driving the first output node (40) to the reference voltage when the second digital control signal is at a high logic level and for driving the first output node (40) to a ground potential when the first digital control signal is at a high logic level. The second voltage source amplifier circuit (14) is responsive to the reference voltage, first digital control signal, second digital control signal, and sec and drive current for driving the second output node (41) to the reference voltage when the first digital control signal is at a high logic level and for driving the second output mace (41) to the ground potential when the second digital control signal is at a high logic level. The transmitter has been designed so as to overcome the problem of line clamping during a power-dawn condition, provides a current limiting function, and reduces the ringing problem associated with driving an inductive load with a high impedance source.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1997</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAIy88pSUxPVSjOLy1KTlVIzC3IyUzLTC3iYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgEGpsYmpuamTobGRCgBAL2qIf8</recordid><startdate>19970709</startdate><enddate>19970709</enddate><creator>PETERSON, JOE WILLIAM</creator><creator>BREHMER, GEOFFREY EMIL</creator><scope>EVB</scope></search><sort><creationdate>19970709</creationdate><title>Voltage source amplifier</title><author>PETERSON, JOE WILLIAM ; BREHMER, GEOFFREY EMIL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP0534575B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>1997</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>PETERSON, JOE WILLIAM</creatorcontrib><creatorcontrib>BREHMER, GEOFFREY EMIL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PETERSON, JOE WILLIAM</au><au>BREHMER, GEOFFREY EMIL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Voltage source amplifier</title><date>1997-07-09</date><risdate>1997</risdate><abstract>A transmitter for converting a binary digital signal into a pseudo-ternary signal at first and second output nodes (40, 41) to form differential output voltages includes a current source amplifier circuit (10), a first voltage source amplifier circuit (12), and a second voltage source amplifier circuit (14). The current source amplifier circuit (10) is responsive to a reference current for generating a first drive current and a second drive current. The first voltage source amplifier circuit (12) is responsive to a reference voltage, a first digital control signal, a second digital control signal and the first drive current for driving the first output node (40) to the reference voltage when the second digital control signal is at a high logic level and for driving the first output node (40) to a ground potential when the first digital control signal is at a high logic level. The second voltage source amplifier circuit (14) is responsive to the reference voltage, first digital control signal, second digital control signal, and sec and drive current for driving the second output node (41) to the reference voltage when the first digital control signal is at a high logic level and for driving the second output mace (41) to the ground potential when the second digital control signal is at a high logic level. The transmitter has been designed so as to overcome the problem of line clamping during a power-dawn condition, provides a current limiting function, and reduces the ringing problem associated with driving an inductive load with a high impedance source.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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| subjects | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PULSE TECHNIQUE TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | Voltage source amplifier |
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