Sampling clock generating circuit

A circuit generates a sampling clock which is used for the A-D conversion of a video signal. A master clock produced by a frequency synthesizer (1) is demultiplied in frequency at dividing ratio NS by a programmable frequency demultiplier (2) which is reset by the horizontal sync signal. The resulti...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	MAESHIMA, KAZUYA
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PICTORIAL COMMUNICATION, e.g. TELEVISION
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!