Semiconductor memory device including nonvolatile memory cells, enhancement type load transistors, and peripheral circuits having enhancement type transistors

A semiconductor memory device comprises a non-volatile memory cell array (70) having a plurality of memory cells (71), enhancement type load transistors (73, 73') having a threshold voltage, and at least one peripheral circuit, such as level shifters (74), column decoders (76), etc., including...

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Hauptverfasser: UEMURA, TERUO, KAWASE, YUKIO
Format: Patent
Sprache:eng ; fre ; ger
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