AGC DELAY ON AN INTEGRATED CIRCUIT

Circuitry is disclosed for staggering the onset of gain reduction in a series of cascaded gain stages as a function of received signal strength. The staggering is effected by controlling the area ratio between corresponding components in two or more AGC control circuits whose topologies are otherwis...

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Bibliographische Detailangaben
1. Verfasser: SUTER, RICHARD R
Format: Patent
Sprache:eng
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