Multi-channel memory access circuit

In may situations, contiguous data is not stored at contiguous locations within a memory. This fact alone causes an increase in processor time for retrieval purposes or the intervention of a memory management unit of some type. The situation is compounded when large amounts of data must be obtained from the memory or stored in the memory in real time. This problem is addressed by arranging a dual ported memory between the main memory (11) and the processor (10) and transferring the desired data into the dual ported memory. A pair of buffers (block0, block1) in the dual ported memory is then used for each channel having access to the memory. While one buffer is being read, the other is being loaded. This structure also allows multiple devices to access the single main memory substantially simultaneously. [FIG. 1]