Multiple port integrated DMA and interrupt controller and arbitrator

Both DMA access and character interrupt driven access modes of service are provided to multiple communication ports by an integrated arbitration DMA/interrupt controller utilizing its own resident randomly accessible memory. Pipelined logic control architecture for handling service mode adaptations...

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Hauptverfasser:	BURRUS, GILBERT STEVEN, JR, MARR, MICHAEL RAYMOND, MARSICO, MARIO ANTHONY, COOPER, RONALD JULIUS, PESCATORE, JOHN CARMINE
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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creator	BURRUS, GILBERT STEVEN, JR MARR, MICHAEL RAYMOND MARSICO, MARIO ANTHONY COOPER, RONALD JULIUS PESCATORE, JOHN CARMINE
description	Both DMA access and character interrupt driven access modes of service are provided to multiple communication ports by an integrated arbitration DMA/interrupt controller utilizing its own resident randomly accessible memory. Pipelined logic control architecture for handling service mode adaptations for each individual port and for managing memory accesses to main system memory enables the use of the random access memory with its inherent time delays in a manner that virtually eliminates the effect of any time delay in overall memory access throughput.
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title	Multiple port integrated DMA and interrupt controller and arbitrator
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