TRANSISTOR ARRAY ARRANGEMENT

A transistor array arrangement for providing high-density semiconductor logic circuits in double polysilicon technology is described. Semiconductor, for example, FET, logic circuits have four independent but simultaneously accessible FET devices which are formed by intersecting sets of polysilicon g...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KILEY, DONALD BURNS, KALTER, HOWARD LEO
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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