Halbleiteranordnung mit Überchipanschlüssen

Halbleiteranordnung mit Überchipanschlüssen

A semiconductor device (10) has a lead-on-chip (LOC) configuration. Leads (24) of the device have on-chip portions (36, 38) which are electrically coupled to peripheral bond pads (14) by conductive wires (30) and off-chip portions (42). On-chip portions (38) of the leads extend from the central port...

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Hauptverfasser: CASTO, JAMES J., AUSTIN, TEXAS 78734, US, MCSHANE, MICHAEL B., AUSTIN, TEXAS 78750, US, AFSHAR, DAVID D., AUSTIN, TEXAS 78759, US, BIGLER, CHARLES G., AUSTIN, TEXAS 78737, US
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Sprache:ger
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator CASTO, JAMES J., AUSTIN, TEXAS 78734, US
MCSHANE, MICHAEL B., AUSTIN, TEXAS 78750, US
AFSHAR, DAVID D., AUSTIN, TEXAS 78759, US
BIGLER, CHARLES G., AUSTIN, TEXAS 78737, US
description A semiconductor device (10) has a lead-on-chip (LOC) configuration. Leads (24) of the device have on-chip portions (36, 38) which are electrically coupled to peripheral bond pads (14) by conductive wires (30) and off-chip portions (42). On-chip portions (38) of the leads extend from the central portions toward centerline A-A for improved adhesion. At least one on-chip portion (28) is forked and includes a branch which lacks a direct wire bond connect, also for improved adhesion. In one embodiment, tie bar (22) of leadframe (16) is used to distribute power across semiconductor chip (12). The leadframe may also include chip alignment features (50) and tape alignment features (52) to align chip (12) and insulating tape (18) to the leadframe, respectively.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Halbleiteranordnung mit Überchipanschlüssen
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