DRAM mit gegen Diaphonie abgeschirmten Bitleitungen

This invention relates to semiconductor memories and includes a sense amplifier architecture in which sensed data bit lines (e.g. BL2, BL2 min ) are electrically isolated and shielded from their immediately adjacent active neighbors by utilization of non-selected bit lines (e.g. BL1, BL1 min and/or...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KALTER, HOWARD LEO, COLCHESTER, VT. 05 446, US, FIFIELD, JOHN ATKINSON, UNDERHILL, VT. 05 489, US
Format:	Patent
Sprache:	ger
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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