MOS-Speicherzelle mit einem exponentiellen Dotierungsprofil und mit versetztem Tunneloxid des schwebenden Gates

A semiconductor memory device having a CMOS memory cell with a floating gate (18) and increasing concentration of dopant in the source (14), drain (12) and channel (25) regions. Typically the concentration profile is generally exponential. The device has relatively high diffusion current densities a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: FORSYTHE, DONALD D., PALO ALTO, CA 95010, US, WALKER, GEORGE P., CAPITOLA, CA 95010, US, GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US, ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US
Format: Patent
Sprache:ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator FORSYTHE, DONALD D., PALO ALTO, CA 95010, US
WALKER, GEORGE P., CAPITOLA, CA 95010, US
GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US
ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US
description A semiconductor memory device having a CMOS memory cell with a floating gate (18) and increasing concentration of dopant in the source (14), drain (12) and channel (25) regions. Typically the concentration profile is generally exponential. The device has relatively high diffusion current densities accelerated toward the surface and directed toward the channel/drain interface. Gate oxidation thickness is reduced over the channel (25) near the drain (12) to create a tunnel "window" (30) in the area of greatest electric field magnitude.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_DE69009221TT2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>DE69009221TT2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_DE69009221TT23</originalsourceid><addsrcrecordid>eNqNi7EOgjAURVkcjPoPjTsJYmLCLKiLcaA7QXqRJuW16StK-HrR-AFO9-TmnGVkr7cyLh1008FPMAai10FAE3qB0VkCBf35SeR2Jj_Qg523rTZiIPW1n_CMMIU5kQMRjB21EgosuOleuIPUnJ_rAF5Hi7Y2jM1vV9H2VMjjJYazFdjVDQihyotDliRZmu6kTPd_SW8QyUSb</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MOS-Speicherzelle mit einem exponentiellen Dotierungsprofil und mit versetztem Tunneloxid des schwebenden Gates</title><source>esp@cenet</source><creator>FORSYTHE, DONALD D., PALO ALTO, CA 95010, US ; WALKER, GEORGE P., CAPITOLA, CA 95010, US ; GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US ; ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US</creator><creatorcontrib>FORSYTHE, DONALD D., PALO ALTO, CA 95010, US ; WALKER, GEORGE P., CAPITOLA, CA 95010, US ; GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US ; ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US</creatorcontrib><description>A semiconductor memory device having a CMOS memory cell with a floating gate (18) and increasing concentration of dopant in the source (14), drain (12) and channel (25) regions. Typically the concentration profile is generally exponential. The device has relatively high diffusion current densities accelerated toward the surface and directed toward the channel/drain interface. Gate oxidation thickness is reduced over the channel (25) near the drain (12) to create a tunnel "window" (30) in the area of greatest electric field magnitude.</description><edition>5</edition><language>ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19941215&amp;DB=EPODOC&amp;CC=DE&amp;NR=69009221T2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19941215&amp;DB=EPODOC&amp;CC=DE&amp;NR=69009221T2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FORSYTHE, DONALD D., PALO ALTO, CA 95010, US</creatorcontrib><creatorcontrib>WALKER, GEORGE P., CAPITOLA, CA 95010, US</creatorcontrib><creatorcontrib>GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US</creatorcontrib><creatorcontrib>ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US</creatorcontrib><title>MOS-Speicherzelle mit einem exponentiellen Dotierungsprofil und mit versetztem Tunneloxid des schwebenden Gates</title><description>A semiconductor memory device having a CMOS memory cell with a floating gate (18) and increasing concentration of dopant in the source (14), drain (12) and channel (25) regions. Typically the concentration profile is generally exponential. The device has relatively high diffusion current densities accelerated toward the surface and directed toward the channel/drain interface. Gate oxidation thickness is reduced over the channel (25) near the drain (12) to create a tunnel "window" (30) in the area of greatest electric field magnitude.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EOgjAURVkcjPoPjTsJYmLCLKiLcaA7QXqRJuW16StK-HrR-AFO9-TmnGVkr7cyLh1008FPMAai10FAE3qB0VkCBf35SeR2Jj_Qg523rTZiIPW1n_CMMIU5kQMRjB21EgosuOleuIPUnJ_rAF5Hi7Y2jM1vV9H2VMjjJYazFdjVDQihyotDliRZmu6kTPd_SW8QyUSb</recordid><startdate>19941215</startdate><enddate>19941215</enddate><creator>FORSYTHE, DONALD D., PALO ALTO, CA 95010, US</creator><creator>WALKER, GEORGE P., CAPITOLA, CA 95010, US</creator><creator>GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US</creator><creator>ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US</creator><scope>EVB</scope></search><sort><creationdate>19941215</creationdate><title>MOS-Speicherzelle mit einem exponentiellen Dotierungsprofil und mit versetztem Tunneloxid des schwebenden Gates</title><author>FORSYTHE, DONALD D., PALO ALTO, CA 95010, US ; WALKER, GEORGE P., CAPITOLA, CA 95010, US ; GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US ; ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_DE69009221TT23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>ger</language><creationdate>1994</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FORSYTHE, DONALD D., PALO ALTO, CA 95010, US</creatorcontrib><creatorcontrib>WALKER, GEORGE P., CAPITOLA, CA 95010, US</creatorcontrib><creatorcontrib>GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US</creatorcontrib><creatorcontrib>ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FORSYTHE, DONALD D., PALO ALTO, CA 95010, US</au><au>WALKER, GEORGE P., CAPITOLA, CA 95010, US</au><au>GADEPALLY, BAHSKAR V.S., SAN JOSE, CA 95129, US</au><au>ARONOWITZ, SHELDON, SAN JOSE, CA 95127, US</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MOS-Speicherzelle mit einem exponentiellen Dotierungsprofil und mit versetztem Tunneloxid des schwebenden Gates</title><date>1994-12-15</date><risdate>1994</risdate><abstract>A semiconductor memory device having a CMOS memory cell with a floating gate (18) and increasing concentration of dopant in the source (14), drain (12) and channel (25) regions. Typically the concentration profile is generally exponential. The device has relatively high diffusion current densities accelerated toward the surface and directed toward the channel/drain interface. Gate oxidation thickness is reduced over the channel (25) near the drain (12) to create a tunnel "window" (30) in the area of greatest electric field magnitude.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language ger
recordid cdi_epo_espacenet_DE69009221TT2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title MOS-Speicherzelle mit einem exponentiellen Dotierungsprofil und mit versetztem Tunneloxid des schwebenden Gates
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T09%3A00%3A15IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=FORSYTHE,%20DONALD%20D.,%20PALO%20ALTO,%20CA%2095010,%20US&rft.date=1994-12-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EDE69009221TT2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true