Direktgekoppelte Halbleiterlogikschaltung

In a semiconductor logic circuit, a plurality of gates are provided, each formed of a junction type field effect transistor. The junction type field effect transistor of one of the gates is directly coupled to the junction type field effect transistor of a succeeding gate. An element is provided for clamping an output voltage of the junction type field effect transistor of the one gate, which provides an input voltage for the junction type field effect transistor of the succeeding gate, to below about a forward voltage of a pn junction of the succeeding gate.