DE2715983
Apparatus for monitoring and controlling the sequence analysis of processor operations in electronic digital computers. Each flip-flop in a flip-flop chain is associated with an operational step for setting up a monitoring and check sequence. The sequence is controlled by a flip-flop ring and consis...
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| creator | LAMPE, HANS HERMANN, 7033 HERRENBERG, DE HUESING, JUERGEN, 7032 SINDELFINGEN, DE |
| description | Apparatus for monitoring and controlling the sequence analysis of processor operations in electronic digital computers. Each flip-flop in a flip-flop chain is associated with an operational step for setting up a monitoring and check sequence. The sequence is controlled by a flip-flop ring and consists of several steps each of which represents a monitoring or check function. An oscillator signal is fed to all flip-flop stages, together with a further control signal. Switching of flip-flops is effected in such a manner that at any one time only one flip-flop is on, its output signal and a coinciding oscillator signal generating a control signal which is converted in an address generator into an address for fetching a subroutine from a storage to control the monitoring and check function associated with the flip-flop. |
| format | Patent |
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Each flip-flop in a flip-flop chain is associated with an operational step for setting up a monitoring and check sequence. The sequence is controlled by a flip-flop ring and consists of several steps each of which represents a monitoring or check function. An oscillator signal is fed to all flip-flop stages, together with a further control signal. Switching of flip-flops is effected in such a manner that at any one time only one flip-flop is on, its output signal and a coinciding oscillator signal generating a control signal which is converted in an address generator into an address for fetching a subroutine from a storage to control the monitoring and check function associated with the flip-flop.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1983</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19831229&DB=EPODOC&CC=DE&NR=2715983C2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19831229&DB=EPODOC&CC=DE&NR=2715983C2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LAMPE, HANS HERMANN, 7033 HERRENBERG, DE</creatorcontrib><creatorcontrib>HUESING, JUERGEN, 7032 SINDELFINGEN, DE</creatorcontrib><title>DE2715983</title><description>Apparatus for monitoring and controlling the sequence analysis of processor operations in electronic digital computers. Each flip-flop in a flip-flop chain is associated with an operational step for setting up a monitoring and check sequence. The sequence is controlled by a flip-flop ring and consists of several steps each of which represents a monitoring or check function. An oscillator signal is fed to all flip-flop stages, together with a further control signal. Switching of flip-flops is effected in such a manner that at any one time only one flip-flop is on, its output signal and a coinciding oscillator signal generating a control signal which is converted in an address generator into an address for fetching a subroutine from a storage to control the monitoring and check function associated with the flip-flop.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1983</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOB0cTUyNzS1tDDmYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxcPXORsZEKAEA0NkaiA</recordid><startdate>19831229</startdate><enddate>19831229</enddate><creator>LAMPE, HANS HERMANN, 7033 HERRENBERG, DE</creator><creator>HUESING, JUERGEN, 7032 SINDELFINGEN, DE</creator><scope>EVB</scope></search><sort><creationdate>19831229</creationdate><title>DE2715983</title><author>LAMPE, HANS HERMANN, 7033 HERRENBERG, DE ; HUESING, JUERGEN, 7032 SINDELFINGEN, DE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_DE2715983C23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1983</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>LAMPE, HANS HERMANN, 7033 HERRENBERG, DE</creatorcontrib><creatorcontrib>HUESING, JUERGEN, 7032 SINDELFINGEN, DE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LAMPE, HANS HERMANN, 7033 HERRENBERG, DE</au><au>HUESING, JUERGEN, 7032 SINDELFINGEN, DE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DE2715983</title><date>1983-12-29</date><risdate>1983</risdate><abstract>Apparatus for monitoring and controlling the sequence analysis of processor operations in electronic digital computers. Each flip-flop in a flip-flop chain is associated with an operational step for setting up a monitoring and check sequence. The sequence is controlled by a flip-flop ring and consists of several steps each of which represents a monitoring or check function. An oscillator signal is fed to all flip-flop stages, together with a further control signal. Switching of flip-flops is effected in such a manner that at any one time only one flip-flop is on, its output signal and a coinciding oscillator signal generating a control signal which is converted in an address generator into an address for fetching a subroutine from a storage to control the monitoring and check function associated with the flip-flop.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | DE2715983 |
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