LOGISCHE SCHALTUNGSANORDNUNG MIT MOS-TRANSISTOREN

The invention relates to logic CMOS transistor circuits formed by at least one gate circuit, each gate circuit comprising a pair of CMOS transistor groups connected in series between the terminals of a power supply. The conductive state of both groups of transistors defines the potential of a common connection point or output node. A power dissipating means of relatively high resistance is coupled in parallel with at least a part of at least one of the said transistor groups, at least during a time interval in which both groups are in a non conductive state. This results in a quasi static behavior of the circuits according to the invention although the basic structure of the same is that of dynamic circuits.